研究领域
数字集成电路设计 VLSI测试与可测性设计 ECC加密算法及硬件实现 电气、仪表与计算机控制系统 电子电路设计
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Test patterns of multiple SIC vectors: theory and application in BIST schemes 梁峰Feng Liang; Luwen Zhang; Shaochong Lei; 等 2013-04-05 IEEE Trans. on VLSI An Optimized Seed-based Pseudo-random Test Pattern Generator: Theory and Implementation Sun Haijun(孙海珺), Zeng Yongjia(曾永甲), Li Pu(李璞), Lei 2011-12-17 JETTA Design of Four-wave Oscillating Cellular-Neural-Network Zhang Guohe(张国和), Lei SC, M Tanaka, BG Kumar 2011-06-28 IEICE A unified solution to reduce test power and test volume for Test-per-scan schemes Shaochong Lei, Zhen Wang(王震), Zeye Liu(刘泽叶) 2010-09-09 IEICE Electronics Express A Low Power Test Pattern Generator for BIST Lei SC, Feng L(梁峰), Liu ZY(刘泽叶), Wang XY(王晓瑛) 2010-05-04 IEICE Trans. Electronics Explore the Limits to Reduce Test Power Lei SC, Jiang ZW, and D M H Walker 2008-10-31 IEEE D3T-2008 A Class of SIC Circuits: Theory and Application in BIST Design Lei SC, Hou XY(侯学彦), Shao ZB(邵志标), Liang Feng 2008-01-03 IEEE Trans.Circuits and System II