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个人简介

教育背景 1998.09-2002.06电子科技大学,微电子学与固体电子学,学士学位 2002.09-2007.07电子科技大学,微电子学与固体电子学,博士学位 工作履历 2007.07-2009.06电子科技大学微电子与固体电子学院,任讲师 2009.07-2015.06电子科技大学微电子与固体电子学院,任副教授 2013.07-2014.08教育部高等教育司理工处借调工作 2015.07至今 电子科技大学电子科学与工程学院,任教授

研究领域

主要从事数模混合集成电路设计、传感器读出系统设计、高速时钟和数据接口设计,电源管理芯片设计等领域的研究工作,特别在超高速低功耗ADC、传感读出和显示驱动等领域有长期积累。

近期论文

查看导师新发文章 (温馨提示:请注意重名现象,建议点开原文通过作者单位确认)

[1] Jing Li, Shuangyi Wu, Yang Liu, Ning Ning, Qi Yu. "A Digital Timing Mismatch Calibration Technique in Time-Interleaved ADCs", IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—II: EXPRESS BRIEFS, 2014, 61(7):486-490. [2] Ling Du, Ning Ning* , Shuangyi Wu, Qi Yu, Yang Liu. "A digital background calibration technique for SAR ADC based on capacitor swapping", IEICE Electronics Express, 2014, 11(12):1-11. [3] Ning Ning*, Zhenxiao Tong, Dejun Yu, Shuangyi Wu, Wenbin Chen, and Chunyi Feng. “Highly AC Voltage Fluctuation-Resistant LED Driver with Sinusoid-Like reference”, Journal of Power Electronics, 2014, 14(2): 257-264. [4] Ning Ning*, Zhiling Sui, Jing Li, Shuangyi Wu, Hua Chen, Shuangheng Xu, Qi Yu. “Multi Scaling Coefficients Technique for Convergence Speed Boosting in Gain Error Background Calibration of Pipelined ADC”, Journal of Circuits, System, and Computers, 2014, 23(3), pp: 145003401-145003412. [5] Ning Ning*, Siyuan Zhao, Kejun Wu, Shuangyi Wu, Taizhong Liu, Junming Han, Liang Li. “A Subthreshold MOSFET Voltage Reference Based on Current Mirror Technology Under 55 nm CMOS Process”, Nanoscience and Nanotechnology Letters, 2014, 6(2), pp:128-133. [6] Ning Ning*, Ling Du, Hua Chen, Shuangyi Wu, Qi Yu, Yang Liu. “A Dithering Technique for SHA_Less Pipelined ADC”, Journal of Circuits, System, and Computers, 2014, 23(1), pp:14500601-14500612. [7] Ning Ning*, Wenbin Chen, Dejun Yu, Chunyi Feng, Chengbi Wang. “Self-adaptive load technology for multiplestring LED drivers”, Electronics Letters, 2013, 49(18), pp:1170-1171. [8] Ling Du, Ning Ning* , Jun Zhang, Qi Yu , Yang Liu. “Self-Calibrated SAR ADC Based on Split Capacitor DAC without use of Fractional Value Capacitor”, IEEJ Transactions on Electrical and Electronic Engineering, 2013, 8(4), pp:408-414. [9] Ning Ning*, Chunyi Feng, Zhentao Xu, Shuangyi Wu, Kejun Wu, Rui Luo, Qi Yu. “A Sub-1 V Bandgap Reference Based on Different Threshold MOSFETs Under 40 nm Process”, Nanoscience and Nanotechnology Letters, 2012, 4(9), pp:919-923. [10] Ning Ning*, Chunyi Feng, Zhentao Xu, Shuangyi Wu, Kejun Wu, Rui Luo, Qi Yu. “A Sub-1 V Bandgap Reference Based on Different Threshold MOSFETs Under 40 nm Process”, Nanoscience and Nanotechnology Letters, 2012, 4(9): 919-923. [11] Ning Ning*, Sui Zhiling, Chen Hua, Xu Shuangheng, Jun Zhang, Jie Zheng, Shuangyi Wu, Qi Yu. “Transfer characteristic shift technique for full input range in pipelined ADCs with background calibration”, Electrical Review, 2012, 11a: 214-217. [12] Ning Ning*, Yang Fan, Zhiling Sui, Yingshuai Cao, Shuangyi Wu, Qi Yu. “A Fully Differential Operational Transconductance Amplifier under 40nm CMOS Logic Process”, Nanoscience and Nanotechnology Letters, 2012, 4(8): 849-853. [13] Jing Li, Ning Ning, Ling Du, Qi Yu, Yang Liu. “The Impact of Gate Leakage Current on PLL in 65nm Technology: Analysis and Optimization”, Journal of Semiconductor technology and Science, 2012, 12(1): 99-106. [14] Ning Ning*, Yu Qi, Wang Xiang-zhan, Yang Mo-hua, Liu Yuan, Dai Guang-hao. “Settling State Optimization for Folded-Cascode OTA with a Novel Compensation Strategy”. Chinese Journal of Electronics, 2007, 16(1): 63-65. [15] Ning Ning*, WU Shuang-yi, WANG Xiang-zhan, YANG Mo-hua. “A Novel Power Optimization Method by Minimum Comparator Number Algorithm for Pipeline ADCs”. Journal of Electronic Science and Technology of China, 2007, 5(1): 75-80. [16] Ning Ning*, Yu Qi, Wang Xiangzhan, Dai Guanghao, Liu Yuan, Yang Mohua. “A Novel Clock Feedthrough Frequency Compensation for Fast-Settling of Folded-Cascode OTA”. Chinese Journal of Semiconductors, 2006, 27(10): 1737-1741.

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