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个人简介

1985年1987年清华大学学士硕士毕业,1998年美国博士后去硅谷工作了15多年(LSI和AMD),集成电路工艺与设计(从0.13微米 – 45纳米),2013年加入交大微纳院团队,关注教学、关注科研。

研究领域

微纳米科技在航空技术领域的交叉应用 碳纳米管集成电路器件与工艺研究

近期论文

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Yafei Zhang, Li Franklin Duan, Yaozhong Zhang, Jian Wang, Huijuan Geng and Qing Zhang,“Advances in Conceptual Electronic Nanodevices based on 0D and 1D Nanomaterials”, Nano-Micro Lett. 6(1),1-19 (2014). Franklin Duan, Stephen Cooper, Amit Marathe, John Zhang, Sankaran Kartik Jayanarayanan. “Impact of Monitoring Voltage on the Lifetime Extrapolation During the Accelerated Degradation Tests”, IIRW2006. F. Duan, R. Castagnetti, R. Venkatraman, O. Kobozeva, and S. Ramesh, LSI Logic Corporation, “Design and Use of Memory-Specific Test Structures to Ensure SRAM Yield and Manufacturability”, ISQED’2003, pp119-124, 2003 Chuanzhao Yu, J. Zhang, J. S. Yuan, F. Duan, S. K. Jayanarananan, A. Marathe, S. Cooper, V. Pham, and J.-S. Goo, I, “Evaluation of RF Capacitance Extraction for Ultrathin Ultraleaky SOI MOS Devices”, EEE ELECTRON DEVICE LETTERS, VOL. 28, NO. 1, JANUARY 2007 W. Kong, R.Venkatraman, R. Castagnetti, F. Duan and S. Ramesh, “High-Density and High-Performance 6T-SRAM for System-on-Chip in 130 nm CMOS Technology”, VLSI Symposium, 2001. Puchner, H.; Liu, Y.-C.; Kong, W.; Duan, F.; Castagnetti, R.; , “N-Well Engineering to Improve Soft-Error-Rate Immunity for P-Type Substrate SRAM Technologies,” Solid-State Device Research Conference, 2001. Proceeding of the 31st European , vol., no., pp. 295- 298, 11-13 September 2001, Venkatraman, R.; Castagnetti, R.; Kobozeva, O.; Duan, F.L.; Kamath, A.; Sabbagh, S.T.; Vilchis-Cruz, M.A.; Liaw, J.J.; Jyh-Cheng You; Ramesh, S.; , “The design, analysis, and development of highly manufacturable 6-T SRAM bitcells for SoC applications,” Electron Devices, IEEE Transactions on , vol.52, no.2, pp. 218- 226, Feb. 2005. Olga Kobozeva, Ramnath Venkatraman, Ruggero Castagnetti, Franklin Duan, Arvind Kamath and Shiva Ramesh, “Designing high-performance cost-efficient embedded SRAM in deep-submicron era”, Proc. SPIE 5379, 241 (2004);

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