沈继忠 - 浙江大学 - 信息与电子工程学院

个人简介

浙江大学信息与电子工程学院教授，博士生导师。浙江大学电子科学与技术专业博士研究生毕业。至今在国内外学术期刊及国际学术会议发表学术论文160余篇。科研成果获国家教育部科技进步二等奖1项，获浙江省科技进步二等奖1项，三等奖1项，浙江省教育厅科技进步一等奖1项。

研究领域

新型数字集成电路与数字系统设计低功耗设计安全芯片设计脑电信号处理与应用

近期论文

查看导师新发文章（温馨提示：请注意重名现象，建议点开原文通过作者单位确认）

[1] Dynamic current mode logic based flip-flop design for robust and low-power security integrated circuits. Electronics letters, 2017, 53(18):1236-1238. [2] An algorithm for identifying symmetric variables based on the order eigenvalue matrix. Frontiers of information technology & electronic engineering, 2017, 18 (10): 1644-1653. [3] Power-efficient dual-edge implicit pulse-triggered flip-flop with an embedded clock-gating scheme. Frontiers of information technology & electronic engineering, 2016, 17(9):962-972. [4] An Algorithm for Identifying Symmetric Variables in the Canonical Reed-Muller Algebra System. Journal of circuits systems and computers, 2016, 25(10). [5] Design of flip-flops with clock-gating and pull-up control scheme for power-constrained and speed-insensitive applications. IET Computers and digital techniques, 2016, 10(4):193-201. [6] P300-based deception detection in simulated network fraud condition. Electronics letters, 2016, 52(13):1136-1138. [7] A dynamic submatrix-based P300 online brain–computer interface Biomedical. Signal processing and control, 2015. 15: 27-32. [8] Low Power Pulse-triggered Flip-flop Based on Clock Triggering Edge Control Technique. Journal of circuits, systems and computers, 2015, 24(7). [9] A Comprehensive Study of Algebraic Fault Analysis on PRINCE. China Communications, 2015, 12(7):127-141. [10] Low-power level converting flip-flop with a conditional clock technique in dual supply systems. Microelectronics Journal. 2014, 45(7)::857-863. [11] Design of ternary clock generator. Electronics Letters, 2014, 50(15):1052-1054. [12]An algorithm for identifying symmetric variables in the canonical OR-coincidence algebra system. Journal of Zhejiang University(SCIENCE C), 2014, 15(12):1174-1182.