个人简介
2008-今 武汉大学副教授,主要从事集成电路设计、嵌入式计算与控制系统的研发。(2015年1月-2016年2月在美国加州大学圣塔芭芭拉分校计算机科学系做访问学者,从事忆阻器模型及其应用研究) 2003-2007 在中国科学院计算技术研究所工作(其中2003-2004在计算所进行博士后研究,2004-2005在法国国家自动化与信息研究所(INRIA)从事博士后研究,其余时间在计算所工作,均主要研究复杂算法的电路级别的加速和系统集成) 1998-2002 在华中理工大学攻读博士学位,从事通信协议以及电路系统研究 1995-1998 在华中理工大学光电子工程系(现光电学院)攻读硕士,从事微弱信号检测研究 1991-1995 在沈阳航空工业学院(现沈阳航空航天大学)本科学习
研究领域
1. 电路与系统设计2. 可重构计算3. 计算机体系结构
近期论文
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1. 彭昊,黄骏雄,江先阳.常胜. 多通道高保真音频信号IIR滤波器设计. 电子技术应用, Vol. 41, No. 11, pp.24-26, 30, 2015. 2. 黄骏雄,江先阳.常胜. 一种高质量的多通道I2S与TDM128音频信号转换接口电路设计. 科学技术与工程, Vol.15, No.18, pp.195-198,218, 2015. 3. 张红敏,江先阳. 双输出FPGA 基本逻辑单元结构的布局布线影响研究. 微电子学与计算机, Vol.31, No.2, pp.146-152, 2014. 4. Xianyang Jiang, Peng Xiao, Meikang Qiu, and Gaofeng Wang. Performance effects of pipeline architecture on an FPGA-based binary32 floating point multiplier. Microprocessors and Microsystems, 37(8-D): 1183-1191, 2013 5. 刘世培,江先阳,肖鹏,汪波,邓业东.一种基于FPGA 的稀疏矩阵高效乘法器. 微电子学,, Vol.43, No.2, pp.153-157, 2013. 6. 肖鹏,江先阳,王高峰,汪波,刘世培. 基于FPGA 的高速双精度浮点乘法器设计.微电子学与计算机, Vol.29, No.12, pp.17-21, 2013. 7. Xianyang Jiang, Deshi Li, Shaobo Nie, Jing Luo, Zhonghai Lu. An enhanced IOT gateway in a broadcast system. IEEE 9th Intl. Conf. on Ubiquitous Intelligence and Computing (UIC) / IEEE 9th Intl. Conf. on Autonomic and Trusted Computing (ATC), 2012/9/4-2012/9/7, pp 746-751. 8. Xianyang Jiang, Deshi Li, Peng Xiao, Shipei Liu, Zhonghai Lu. Lessons of IOT effects on backbone networks learnt from traffic characteristics. The 8th Intl. Conf. on Wireless Communications, Networking and Mobile Computing, Shanghai, China, 2012/9/21-2012/9/23. 9. Pierre Schamberger, Zhonghai Lu, Xianyang Jiang, Meikang Qiu. Modeling and power evaluation of on-chip router components in spintronics. Sixth ACM/IEEE International Symposium on Networks-on-Chip, Copenhagen, Denmark, May 9-11,2012. 10. Xianyang Jiang, Ying Liu, Shilei Sun, Gaofeng Wang. An improved packing tool based on a dual-output basic logic element. Proc. of IEEE ASICON 2011, Xiamen, China 11. 张鹏程,祁昶,江先阳,石新智,王高峰. 量子级联激光器的一种新的等效电路模型.光电子激光, Vol.22, No.9, 2011, pp:1313-1316. 12. 袁海洋,江先阳,刘锋,王高峰. 应用于ROHC 的CRC 算法硬件实现. 微电子学. Vol.41, No.5, 2011, pp:736-740. 13. Ying Liu, Xianyang Jiang, Shilei Sun, and Gaofeng Wang. An efficient FPGA packing algorithm based on simple dual-output basic logic elements. The IEEE 8th International Conference on ASIC (IEEE ASICON 2009), Changsha, China, 2009. 14. Xianyang Jiang and Stephen S.-T. Yau, “Bioinformatics oriented algorithms and dedicated architectures,” Chapter 5 in Supercomputing Research Advances, Yongge Huang, ed., Nova Science Publishers Inc., New York, Aug. 2008. 15. Xianyang Jiang, Dominique Lavenier, Stephen S. T. Yau. Coding region prediction based on a universal DNA sequence representation method. Journal of Computational Biology, Vol.15, No.10, 2008, pp:1237-1256. 16. Xianyang Jiang, Stephen S. T. Yau. A novel analysis model for DNA sequences. IEEE Int. Conf. on BioMedical Engineering and Informatics (BMEI2008),2008, Hainan, China. 17. Xianyang Jiang, Xinchun Liu, Lin Xu, Peiheng Zhang, and Ninghui Sun. A reconfigurable accelerator for Smith-Waterman algorithm. IEEE Trans. on Circuits and Systems-II, Vol.54, No.12, 2007, pp:1077-1081.