沙金 - 南京大学 - 电子科学与工程学院

个人简介

2007年毕业于南京大学，获工学博士学位； 07至08年供职于美国OmniVision公司； 08年至今就职于南京大学电子学院。12至13年美国斯坦福大学任访问学者。近年主要开展集成电路设计、信道编码、闪存纠错、机器智能等方面的研究。目前主持承担国家自然科学基金、教育部基金、江苏省重点项目、企业及科研院所横向委托等多项科研项目

研究领域

集成电路设计；信道编码；闪存纠错；机器学习

近期论文

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Guanghui Hu, Jin Sha, etc. High-Speed Parallel LFSR Architectures Based on Improved State-Space Transformations，IEEE Transactions on Very Large Scale Integration Systems，2017 Kai Huang, Jin Sha, Wei Shi, Zhongfeng Wang, An Efficient FPGA Implementation for 2-D MUSIC Algorithm, Circuits Syst & Signal Process，2016 Jin Sha, Jingbo Liu and Zhongfeng Wang, Improved BP decoder for polar codes based on a modified kernel matrix, Electronics Letters, 2016. Jin Sha, Jingbo Liu, Jun Lin, Zhongfeng Wang, A Stage-Combined Belief Propagation Decoder for Polar Codes, Journal of Signal Processing Systems, 2016. Kai He, Jin Sha, etc. “Nonbinary LDPC Code Decoder Architecture With Efficient Check Node Processing”, IEEE Trans. on Circuits and Systems II, vol. 59, no. 6, pp. 381-385, 2012. Jin Sha, etc. “Multi-Gb/s LDPC Code Design and Implementation”，IEEE Trans. on VLSI Systems, vol. 17, no. 2, pp. 262-268, Feb. 2009. Jin Sha, etc. “Decoder Design for RS-Based LDPC Codes”, IEEE Trans. on Circuits and Systems II, vol. 56, no. 9, pp. 724-728, Sep. 2009. Jin Sha, etc. “LDPC Decoder Design for High Rate Wireless Personal Area Networks”, IEEE Trans. on Consumer Electronics, vol. 55, no. 2, pp. 455-460, May. 2009. Jun Lin, Jin Sha, etc.“Efficient Decoder Design for Non-Binary Quasi-Cyclic LDPC Codes”, IEEE Trans. on Circuits and Systems I, Vol.57, no.5, pp. 1071-1082, May 2010. Zhongfeng Wang, Zhiqiang Cui, Jin Sha, “VLSI Design for Low-Density Parity-Check Code Decoding”, IEEE Circuits and Systems Magazine, vol. 11, no. 1, pp. 52-69, Feb. 2011. (Review Paper)