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[1]Khawar Sarfraz, Jin He, Mansun Chan, "A 140mV Variation-Tolerant Deep Sub-Threshold SRAM in 65nm CMOS," IEEE Journal of Solid-State Circuits (IEEE JSSC), Vol: 52, No:8, pp.2215-2220, August, 2017. [2] Siu-Fung Leung, Qianpeng Zhang，Mohammad Mahdi Tavakoli, Jin He, Xiaoliang Mo,and Zhiyong Fan，“Progress and Design Concerns of Nanostructured Solar Energy Harvesting Devices，”Small，12, 2536-2548(2016). [3] Aashir Waleed, Qianpeng Zhang, Mohammad Mahdi Tavakoli, Siu-Fung Leung, Leilei Gu, Jin He, Xiaoping Mo and Zhiyong Fan, "Performance Improvement of Solution-processed CdS/CdTe Solar Cells with a Thin Compact TiO2 Buffer Layer", Sci. Bull.,Vol. 60(1)86-91：2016. http://link.springer.com/article/10.1007/s11434-015-0963-0。 [4] Mohammad Mahdi Tavakoli, Leilei Gu, Yuan Gao, Claas Reckmeier, Jin He, Andrey L. Rogach, Yan Yao, Zhiyong Fan, "Fabrication of efficient planar perovskite solar cells using a one-step chemical vapor deposition method" Nature Scientific Reports, SREP-15-08034A, 2015。 [5] M.M.Tavakoli, Siu-Fung Leung, Kwong-Hoi Tsui, Qianpeng Zhang, Jin He, Yan Yao, Dongdong Li, and Zhiyong Fan, "Highly Efficient Flexible Perovskite Solar Cell with Anti-reflection and Self-cleaning Nanostructures ". ACS Nano，DOI 10.1021/acsnano.5b04284, 2015。 [6] Yuanjing Lin, Qingfeng Lin, Xue Liu, Yuan Gao, Jin He, Wenli Wang, Zhiyong Fan, “A Highly Controllable Electrochemical Anodization Process to Fabricate Porous Anodic Aluminum Oxide Membranes”, Nanoscale Research Letters, 10:495，2015. [7] Hao Wang, Hongyu He, Sheng Chang, Yue Hu, Jin He, QJ Huang, Gaofeng Wang, "A Novel Barrier Controlled Tunnel FET". IEEE Electronics Device Letters， EDL-35，No.7, pp.798-800, July, 2014. [8] Lin Li, Lining Zhang, Kit Chun Kwong, Jin He, Mansun Chan, “Phase-Change Memory with Multi-Fin Thin-Film-Transistor Driver Technology." IEEE Electronics Device Letters， EDL-33，Vol. 33, No. 3, , pp. 405-407，March，2012. [9] Lining Zhang, Lin Li, Jin He, Mansun Chan, “ Modeling Short Channel Effect of Elliptic Gate-All-Round MOSET by Effective Radius” . IEEE Electronics Device Letters， EDL-32，No.8, pp.1188-1191, 2011. [10] Min Shi, Jin He, Lining Zhang, Chenyue Ma, Zingye Zhou, Haijun Lou, Hao Zhuang, Ruonan Wang, Yongliang Li, Yong Ma, Wen Wu, Wenping Wang, and Mansun Chan, “Zero Mask Contact Fuse for One Time Programmable Memory in Standard CMOS Processes”, IEEE Electronic Device Letters，EDL-32，No.7, pp.955-957, 2011. [11] Ricky M. Y. Ng, Tao Wang, Feng Liu, Xuan Zuo, Jin He, and Mansun Chan, “Vertically Stacked Silicon Nanowire Transistors Fabricated by Inductive Plasma Etching and Stress-Limited Oxidation”，pp. 520-522, IEEE Electron Device Letters, EDL-30, No.5, 2009. [12] Jin He, Xuemei Xi, Mansun Chan, Senior Member, Kanyu Cao, Student Member, Chenming Hu, Yingxue Li, Xing Zhang, Ru Huang, and Yangyuan Wang, “Normalized Mutual Integral Difference Method to Extract Threshold Voltage of MOSFETs.” IEEE Electron Device Letters, Vol. 23, No. 7, pp.428-430, JULY 2002 [13] Jin He, Xing Zhang, Yangyuan Wang, and Ru Huang,“New Method for Extraction of MOSFET Parameters.” IEEE Electron Device Letters, Vol. 22, pp.397-399, no. 12, DECEMBER, 2001. [14] Yue Hu, Hao Wang, Caixia Du, Miaomiao Ma, Mansun Chan, Jin He , and Gaofeng Wang, “A High-Voltage (> 600 V) N-Island LDMOS with Step-Doped Drift Region in Partial SOI Technology”， IEEE Transactions on Electron Devices, TED-63, No.2, Dec., 2016, PP. 744-750. [15] Hongyu He, Jin He，Hao Wang, Wanling Deng, Liu Yan, and Xueren Zheng, "Trapped-Charge-Effect-Based Above-Threshold Current Expressions for Amorphous Silicon Thin-Film Transistors Consistent With Pao-Sah Model”。IEEE Transactions on Electron Devices, TED-61, No.11, pp. 3744-3750, Nov., 2014. [16] Jin He, Cheng Wang, Haijun Lou , Ruonan Wang , Lin Li, Hailang Liang, Wei Wu , Yun Ye, Ma Yutao, Qin Chen, “A Compact CMOS Compatible Oxide Antifuse with Polysilicon Diode Driver.” IEEE Transactions on Electron Devices, TED-59, No. 9, September, pp. 2539-2541, 2012. [17] Xingye Zhou, Feng Liu, Lining Zhang, Cheng Wang, Jin He, Xing Zhang , and Mansun Chan, “New Unified Scale Length for Four-Terminal Double-Gate MOSFETs.” IEEE Transactions on Electron Devices, TED-59, No.7, pp. 1997-1999, July, 2012. [18] Haijun Lou, Lining Zhang, Yunxi Zhu, Xinnan Lin, Jin He, Mansun Chan, “Performance Enhancement of Junctionless Nanowire Transistors With Dual-Material-Gate.” IEEE Transactions on Electron Devices, TED-59, No.7, pp. 1829-1836, July, 2012. [19] Lining Zhang, Jin He, Xinnan Lin, Mansun Chan, "An Analytical Capacitance Model for Double-Gate Tunnel-FETs" , IEEE Transactions on Electron Devices, TED-59, No. 12, December 2012, pp. 3217-3223.
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