Iyer, Subramanian S. - University of California, Los Angeles

个人简介

Awards and Recognitions 2012 IEEE Daniel Noble award for Emerging Technologies 2011 Asian-American Engineer of the Year (awarded by the Society of Chinese Engineers in 2011) 2010 IBM Fellow 2009 IBM Master Inventor 2004 Distinguished Alumnus of the Indian Institute of Technology, Bombay 2002 IBM Distinguished Engineer Two IBM Corporate awards for the development of embedded DRAM and electrical Fuses Four IBM Outstanding Technical Achievement awards for development of the first SiGe base HBT, “Salicide”, eDRAM and eFUSES 30 Invention Plateaus at IBM. 1995 IEEE Fellow

研究领域

System Scaling Technology, advanced packaging and 3D integration, technologies and techniques for the memory subsystem integration and neuromorphic computing

近期论文

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Iyer, S.S. “Three-dimensional integration: An industry perspective” (2015) MRS Bulletin 40 (3) pp225-232 (2015) S Rosenblatt, D Fainstein, A Cestero, J Safran, N. Robson,T. Kirihata and S.S. Iyer, (2013) “Field tolerant dynamic intrinsic chip ID using 32 nm high-K/metal gate SOI embedded DRAM” IEEE JSSCC 48(4) pp940-947. S.S. Iyer, “The evolution of dense embedded memory in high performance logic technologies”, (2012) IEDM Proceedings pp 33.1.1-33.1.4 Farooq, M. G., & Iyer, S. S. (2011), “3D integration review”. Science in China 54(5), 1012-1025 (2011) Iyer, S. S., Freeman, G., Brodsky, C., Chou, A. I., Corliss, D., Jain, S. H., … & Agnello, P. (2011). 45-nm silicon-on-insulator CMOS technology integrating embedded DRAM for high-performance server and ASIC applications. IBM Journal of Research and Development, 55(3), 5-1. Barth, J., Reohr, W. R., Parries, P., Fredeman, G., Golz, J., Schuster, S. E., … & Iyer, S. S. (2008). A 500 MHz random cycle, 1.5 ns latency, SOI embedded DRAM macro featuring a three-transistor micro sense amplifier. Solid-State Circuits, IEEE Journal of, 43(1), 86-95. Kirihata, T., Parries, P., Hanson, D. R., Kim, H., Golz, J., Fredeman, G., … & Iyer, S. S. (2005). An 800-MHz embedded DRAM with a concurrent refresh mode. Solid-State Circuits, IEEE Journal of, 40(6), 1377-1387 Kothandaraman, C., Iyer, S. K., & Iyer, S. S. (2002). Electrically programmable fuse (eFUSE) using electromigration in silicides. Electron Device Letters, IEEE, 23(9), 523-525 Powell, A. R., & Iyer, S. S. (1994). Silicon-Germanium-Carbon Alloys Extending Si Based Heterostructure Engineering. Japanese journal of applied physics, 33(part 1), 2388-2391.