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个人简介

教育背景 2012年-2018年 加州大学洛杉矶分校,电子与计算机工程,博士 2010年-2012年 加州大学洛杉矶分校,电子工程,硕士 2006年-2010年 复旦大学,微电子学,学士 工作学术经历 2019年-2021年 苹果 Apple Inc. ,射频集成电路工程师 2017年-2019年 博通 Broadcom Inc. ,硬件研发工程师 获奖或荣誉 2013-2014 Analog Devices Outstanding Student Designer Award 2014-2015 Broadcom Foundation Fellowship

研究领域

模数转换器设计,混合信号/射频/模拟集成电路设计

近期论文

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Y. Wang, J. Shi, H. Xu, S. Ji, Y. Mao, T. Zou, J. Tao, H. Min and N. Yan, ‘Analysis and Design of a Dual-Mode VCO With Inherent Mode Compensation Enabling a 7.9–14.3-GHz 85-fs-rms Jitter PLL’, in IEEE Journal of Solid-State Circuits, vol. 58, no. 8, pp. 2252-2266, Aug. 2023. T. Zou, H. Xu, Y. Wang, W. Liu, T. Han, M. Tian, W. Zhu and N. Yan, ‘A 6–12 GHz Wideband Low-Noise Amplifier With 0.8–1.5 dB NF and ±0.75 dB Ripple Enabled by the Capacitor Assisting Triple-Winding Transformer’, in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 70, no. 7, pp. 2802-2813, July 2023. J. Gu, H. Qin, H. Xu, W. Liu, K. Han, R. Yin, L. Deng, X. Shen, Z. Duan, H. Gao and N. Yan, ‘A 23-30 GHz 4-Path Series-Parallel-Combined Class-AB Power Amplifier with 23 dBm Psat, 38.5% Peak PAE and 1.3° AM-PM Distortion in 40nm Bulk CMOS’, 2023 IEEE Radio Frequency Integrated Circuits Symposium (RFIC), San Diego, CA, USA, 2023, pp. 197-200. A. Sun, J. Gu, H. Xu, W. Liu, K. Han, R. Yin, Z. Duan, H. Gao and N. Yan, A 26-32GHz Differential Attenuator with 0.23dB RMS Attenuation Error and 11.2dBm IP1dB in 40nm CMOS Process, 2023 IEEE/MTT-S International Microwave Symposium - IMS 2023, San Diego, CA, USA, 2023, pp. 178-181. Y. Tian, J. Gu, H. Xu, W. Liu, Z. Duan, H. Gao, N. Yan, A 26-32GHz 6-bit Bidirectional Passive Phase Shifter with 14dBm IP1dB and 2.6° RMS Phase Error for Phased Array System in 40nm CMOS, 2023 IEEE/MTT-S International Microwave Symposium - IMS 2023, San Diego, CA, USA, 2023, pp. 195-198. T. Zou, H. Xu, Y. Wang, W. Liu, T. Han, Z. Wang, N. Li, M. Tian, W. Zhu and N. Yan, ‘A Capacitor Assisting Triple-Winding Transformer Low-Noise Amplifier with 0.8-1.5dB NF 6-12GHz BW ±0.75dB Ripple in 130nm SOI CMOS’, 2022 IEEE Radio Frequency Integrated Circuits Symposium (RFIC), Denver, CO, USA, 2022, pp. 231-234. T. Iizuka, H. Xu and A. Abidi, ‘A Tutorial on Systematic Design of CMOS A/D Converters: Illustrated by a 10 b, 500 MS/s SAR ADC with 2 GHz RBW’, IEEE 47th European Solid State Circuits Conference (ESSCIRC), 2021, pp. 381-386. H. Xu and A. Abidi, ‘Analysis and Design of Regenerative Comparators for Low Offset and Noise’, in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 66, no. 8, pp. 2817-2830, Aug. 2019. D. Yang, H. Darabi, A. Abidi, H. Xu, H. Wu and Z. Wang, ‘A Calibration-Free Triple-Loop Bang-Bang PLL Achieving 131fsrms Jitter and -70dBc Fractional Spurs’, 2019 IEEE International Solid-State Circuits Conference (ISSCC), San Francisco, CA, 2019. H. Xu and A. Abidi, ‘Design Methodology for Phase-Locked Loops using Binary (Bang-Bang) Phase Detectors’, in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 64, no. 7, pp.1637-1650, July 2017. H. Xu, H. Wu and R. Wang, Wireless Power Transfer Method and System, US Patent 9,742,222. A. Abidi and H. Xu, ‘Understanding the Regenerative Comparator Circuit’, Proceedings of the IEEE 2014 Custom Integrated Circuits Conference (CICC), San Jose, CA, 2014, pp. 1-8. D. Murphy, H. Darabi and H. Xu, ‘A Noise-Cancelling Receiver Resilient to Large Harmonic Blockers’, in IEEE Journal of Solid-State Circuits, vol. 50, no. 6, pp. 1336-1350, June 2015. D. Murphy, H. Darabi and H. Xu, ‘A Noise-Cancelling Receiver with Enhanced Resilience to Harmonic Blockers’, 2014 IEEE International Solid-State Circuits Conference (ISSCC), San Francisco, CA, 2014, pp. 68-69.

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