揭路 - 清华大学 - 集成电路学院

个人简介

2013-2017年于浙江大学信息与电子工程学院获学士学位，2017-2021年于美国密歇根大学（University of Michigan）电气与计算机工程系（ECE）获博士学位（导师Michael P. Flynn）。2018年获ADI公司杰出设计师奖。2022年5月加入清华大学集成电路学院任职助理教授至今。主要研究方向为先进数模混合集成电路设计，重点包括高精度、高速及低功耗的混合架构模数转换器（ADC）、射频数模转换器（DAC）、可重构数模混合电路、数模混合计算等。近年在集成电路设计领域的一流会议和期刊上发表论文15余篇，其中以一作/通信作在领域顶级会议（ISSCC）和顶级期刊（JSSC）上发表论文7篇，为TINS-SAR、CaNS-SAR、HL-DSM、ZIC等新型ADC架构的提出人，并多次刷新同类ADC的指标记录。

研究领域

模数/数模转换器、可重构数模混合电路、数模混合计算

近期论文

查看导师新发文章（温馨提示：请注意重名现象，建议点开原文通过作者单位确认）

Conference 会议 L. Jie,M. Zhan, X. Tang and N. Sun, "A 0.014mm2 10kHz-BW Zoom-Incremental-Counting ADC Achieving 103dB SNDR and 100dB Full-Scale CMRR, " 2022 IEEE International Solid- State Circuits Conference (ISSCC) L. Jie, H. Chen, B. Zheng and M. P. Flynn, "A 100MHz-BW 68dB-SNDR Tuning-Free Hybrid-Loop DSM with an Interleaved Bandpass Noise-Shaping SAR Quantizer, " 2021 IEEE International Solid- State Circuits Conference (ISSCC) L. Jie,B. Zheng, H. Chen, R. Wang and M. P. Flynn, "A 4th-Order Cascaded-Noise-Shaping SAR ADC with 88dB SNDR Over 100kHz Bandwidth," 2020 IEEE International Solid- State Circuits Conference (ISSCC) L. Jie, B. Zheng and M. P. Flynn, "A 50MHz-Bandwidth 70.4dB-SNDR Calibration-Free Time-Interleaved 4th-Order Noise-Shaping SAR ADC," 2019 IEEE International Solid- State Circuits Conference (ISSCC) M. Zhan, L. Jie, X. Tang and N. Sun, "A 0.004-mm2 200MS/s Pipelined SAR ADC with kT/C Noise Cancellation and Robust Ring-Amp, " 2022 IEEE International Solid- State Circuits Conference (ISSCC) J. M. Correll, L. Jie, S. Song et. al, "An 8-bit 20.7 TOPS/W Multi-Level Cell ReRAM-based Compute Engine," 2022 Symposium on VLSI Circuits B. Zheng, L. Jie, R. Wang and Michael P. Flynn, "A 6GHz 160MHz Bandwidth MU-MIMO Eight-Element Direct Digital Beamforming TX Utilizing FIR H-Bridge DAC" 2020 IEEE Radio Frequency Integrated Circuits Symposium (RFIC) B. Zheng, J. Bell, Y. He, L. Jie and M. Flynn, "A 0.19mm2 128mW 0.8-1.2GHz 2-Beam 8-Element Digital Direct to RF Beamforming Transmitter in 40nm CMOS," 2018 IEEE Radio Frequency Integrated Circuits Symposium (RFIC) Journal 期刊 L. Jie, X. Tang, J. Liu, L. Shen, S. Li, N. Sun and M. P. Flynn, "An Overview of Noise-Shaping SAR ADC: From Fundamentals to the Frontier," in IEEE Open Journal of the Solid-State Circuits Society (OJ-SSCS), vol. 1, 2021 (Invited) L. Jie, H. Chen, B. Zheng and M. P. Flynn, "A Hybrid-Loop Structure and Interleaved Noise-Shaped Quantizer for a Robust 100MHz BW and 69dB DR DSM," in IEEE Journal of Solid-State Circuits (JSSC), Dec. 2021 (Invited) L. Jie, B. Zheng, H. Chen and M. P. Flynn, "A Cascaded Noise-Shaping SAR Architecture for Robust Order Extension," in IEEE Journal of Solid-State Circuits (JSSC), Dec. 2020 (Invited) L. Jie, B. Zheng and M. P. Flynn, "A Calibration-Free Time-Interleaved Fourth-Order Noise-Shaping SAR ADC," in IEEE Journal of Solid-State Circuits (JSSC), Dec. 2019 (Invited) B. Zheng, L. Jie and M. P. Flynn, "A 6-GHz MU-MIMO Eight-Element Direct Digital Beamforming TX Utilizing FIR H-Bridge DAC," in IEEE Transactions on Microwave Theory and Techniques (TMTT), March 2021 B. Zheng, L. Jie, J. Bell, Y. He and M. P. Flynn, "A Two-Beam Eight-Element Direct Digital Beamforming RF Modulator in 40-nm CMOS," in IEEE Transactions on Microwave Theory and Techniques (TMTT), July 2019 N. Collins, A. Tamez, L. Jie, J. Pernillo and M. P. Flynn, "A Mismatch-Immune 12-Bit SAR ADC With Completely Reconfigurable Capacitor DAC," in IEEE Transactions on Circuits and Systems II: Express Briefs (TCAS-II), Nov. 2018