近期论文
查看导师新发文章
（温馨提示：请注意重名现象，建议点开原文通过作者单位确认）
Journal Papers
Xinghua Yang, Nanyang Huang, Yuanchang Chen, Fei Qiao and Huazhong Yang, "A Priority-based Selective Bit Dropping Strategy to Reduce DRAM and SRAM Power in Image Processing," accepted by IEICE ELEX, 2016.
Xinghua Yang,Yue Xing, Fei Qiao, Huazhong Yang, "Design of Energy Efficient Adders Employing Multistage Latency and Approximate Computing," accepted by JCSC, Journal of Circuits, Systems, and Computers, 2016.
Nan Wu, Zheyu Liu, Fei Qiao, Xiaojun Guo, Qi Wei, Yuan Xie, Huazhong Yang, "A Real-Time and Energy-Efficient Implementation of Difference-of-Gaussian with Flexible Thin-Film Transistors." (informal publication), arXiv: 1603.01954v1
Y. Wu; X. Yang; A. Plaza; F. Qiao; L. Gao; B. Zhang; Y. Cui, "Approximate Computing of Remotely Sensed Data: SVM Hyperspectral Image Classification as a Case Study," in IEEE Journal of Selected Topics in Applied Earth Observations and Remote Sensing , vol.PP, no.99, pp.1-13.
H. Jiang, J. Han, F. Qiao and F. Lombardi, "Approximate Radix-8 Booth Multipliers for Low-Power and High-Performance Operation," in IEEE Transactions on Computers, vol. 65, no. 8, pp. 2638-2644, Aug. 1 2016.
Zheyu Liu, Fei Qiao, Qi Wei, Xinghua Yang, Yi Li and Huazhong Yang, "An Ultra-fast and Low-power Design of Analog Circuit Network for DoG Pyramid Construction in SIFT Algorithm," (informal publication), arXiv: .
Xinghua Yang, Fei Qiao, Qi Wei, Huazhong Yang, "A General Scheme for Noise-Tolerant Logic Design Based on Probabilistic and DCVS Approaches," (informal publication), arXiv: 1503.02354.
Yi Li, Qi Wei, Fei Qiao, Huazhong Yang, "Physical Computing With No Clock to Implement the Gaussian Pyramid of SIFT Algorithm ," (informal publication), arXiv: 1408.2289.
Jing Liu, Fei Qiao, Zhijian Ou and Huazhong Yang, "LOW-COMPLEXITY VIDEO ENCODER FOR SMART EYES BASED ON UNDERDETERMINED BLIND SIGNAL SEPARATION," (informal publication), arXiv: 1405.5948.
Shuang Yu, Fei Qiao, Xiao Yang, Li Luo and Huazhong Yang, "A Survey on Low-Complexity Video Coding Methods and Architectures, " Recent Advances in Electrical & Electronic Engineering, 2014, 7: 26-36.
Feitian Li, Fei Qiao, Qi Wei, Huazhong Yang, "A Novel Reconfigurable Computing Architecture for Image Signal Processing Using Circuit-Switched NoC and Synchronous Dataflow Model," (informal publication), arXiv: 1310.3356.
Shuang Yu, Fei Qiao, Li Luo and Huazhong Yang, "INCREASING COMPRESSION RATIO OF LOW COMPLEXITY COMPRESSIVE SENSING VIDEO ENCODER WITH APPLICATION-AWARE CONFIGURABLE MECHANISM, " (informal publication), arXiv: 1311.1419.
Hua Fan, Qi Wei, Fei Qiao, Huazhong Yang, "A novel redundant pipelined successive approximation register ADC, " IEICE Electronics Express, 2013, 10(5): 1-12.
Bingbing Xia, Fei Qiao, Huazhong Yang, Hui Wang, "Design Methodology of Heterogeneous Multi-core Processor with Combination of Parallelized Multi-core Simulator and Common Register File-Based Instruction Set Extension Architecture," Journal of Computers, 2013, 8(2): 356-364.
Xueqing Li, Qi Wei, Fei Qiao, Huazhong Yang, "Balanced Switching Schemes for Gradient-Error Compensation in Current-Steering DACs," IEICE Trans. Electron, 2012, E95-C(11): 1790-1798.
Jing Liu, Fei Qiao, Qi Wei, Huazhong Yang, "A Novel Video Compression Approach Based on Underdetermined Blind Source Separation," (informal publication), arXiv:1205.4572v1.
Bingbing Xia, Fei Qiao, Zidong Du, Di Zhu, Huazhong Yang, "A 'NEAR-THE-BEST' SYSTEM-LEVEL DESIGN METHODOLOGY OF MULTI-CORE H.264 VIDEO DECODER BASED ON THE PARALLELIZED MULTI-CORE SIMULATOR," Journal of Circuits, Systems, and Computers, 2012, 21(7): 13pages.
Wei Qi, Fei Qiao, Huazhong Yang, "Distributed Smart Camera Network," Recent Patents on Electrical Engineering, 2012.04, 5(1): 20-25.
Hongli Gao, Fei Qiao, Huazhong Yang, and Hui Wang, "Design and Implementation of Motion Compensator in Memory Reduced HDTV Decoder with Embedded Compression Engine," MULTIMEDIA TOOLS AND APPLICATIONS, 2012, 56(3): 597-614.
Sisi Tan, Fei Qiao, Huazhong Yang, and Hui Wang, "Design of Reconfigurable Architectures for Multi-Sandards Video Decoder," Recent Patents on Electrical Engineering, 2011, 4(1): 63-70.
Qi Wei, Fei Qiao, Huazhong Yang, "New Development of Analog-to-Digital Converters," Recent Patents on Electrical Engineering, 2011.09, 4(3): 214-220.
Bingbing Xia, Fei Qiao, Huazhong Yang, and Hui Wang, "Heterogeneous Multi-core Systems for Video Processing," Recent Patents on Electrical Engineering, 2010, 3(3): 200-210.
Ni Zhou, Fei Qiao, Huazhong Yang, and Hui Wang, "Effective Memory Architectures of Multi-Processor Systems-on-Chip," Recent Patents on Electrical Engineering, 2010, 3(3): 218-231.
Zhou Ni, QIAO Fei, Tan Sisi, Li Chang, YANG Huazhong, "Implementation and Design for Test of a 32-bit MIPS Processor," Microelectronics, vol. 40, No. 6, pp. 782-786, 2010.(Chinese Version)
周妮，乔飞，谭斯斯，李常，杨华中. 32位MIPS处理器可测性设计与实现. 微电子学, 2010, 40（6）: 782～786
Fucheng Liao, Fei Qiao, Ni Zhou, Sisi Tan, and Huazhong Yang, " Testability Design of MPEG-2 Decoder Chip Based on Module Partition," Video Engineering, vol. 34, No. 11, pp. 35-39, 2010. (Chinese Version)
廖富成，乔飞，周妮，谭斯斯，杨华中. 基于模块划分方法的MPEG-2解码芯片可测性设计. 电视技术, 2010，34（11）：35~39
Fei Qiao, Dingli Wei, Huazhong Yang, and Hui Wang, "Design of a Highly Parallel and Double-Level Pipelined CAVLC Encoder for H.264," ACTA ELECTRONICA SINICA, 2010, 38(7): 1705-1710.(Chinese Version)
乔飞，魏鼎力，杨华中，汪蕙. 一种适用 于H.264标准的高度并行双 层流水线结构CAVLC编码器. 电子学报，2010, 38(7): 1705-1710
Bingbing Xia, Fei Qiao, Huazhong Yang, Hui Wang, A Fault-tolerant Structure for Reliable Multi-core Systems Based on Hardware-Software Co-design, (informal publication), arXiv:0910.3736v1
Hongli Gao, Fei Qiao, Huazhong Yang, and Hui Wang, "Memory Reduction Techniques for HDTV Video Decoders," Recent Patents on Electrical Engineering, 2009, 2(3): 215-225.
Fei Qiao, Huazhong Yang, WANG Hui, "Low-standby-current and high-speed SAFF with improved conditional-precharge modules," International Journal of Electronics, June 2009, 96(6): 639–656.
Hongli Gao, Fei Qiao, Huazhong Yang, "A Lossless Memory Reduction and Efficient Frame Storage Architecture for HDTV Video Decoder," Journal of Applied Sciences - Electronics and Information Engineering, 2009, 27(1): 67-73.
Li Jian, Qiao Fei, Luo Rong, Yang Huazhong, "A SRAM-less Deblocking Filter in H.264/AVC," Journal of Electronics & Information Technology, 2008, 30(8): 2012-2016.(Chinese Version)
李健，乔飞，罗嵘，杨华中. 无SRAM去块效应滤波器. 电子与信息学报，2008，30(8): 2012-2016
Zhang Di, Quan Jinguo, Qiao Fei, Luo Rong, Yang Huazhong, "A Reconfigurable AHB Interface Component for SOC," Journal of Electronics & Information Technology, 2008, 30(8): 2008-2011.(Chinese Version)
张頔，权进国，乔飞，罗嵘，杨华中. 面向SOC的可配置AHB接口组件. 电子与信息学报，2008，30(8): 2008-2011
QIAO Fei, YANG Huazhong, HUANG Gang and WANG Hui, “Implementation of Low-Swing Differential Interface Circuits for High-Speed On-Chip Asynchronous Interconnection,” Science in China Ser. F: Information Science, 2008, 51(7): 975-984.
QIAO Fei, YANG Huazhong, HUANG Gang and WANG Hui, “Implementation of Low-Swing Differential Interface Circuits for High-Speed On-Chip Asynchronous Interconnection,” Science in China Ser. E: Information Science, 2008, 38(4):627-636 (Chinese Version)
乔飞，杨华中，黄刚，汪蕙. 可用于高速片上系统异步IP互连的低摆幅差分接口电路. 中国科学（E：信息科学），2008, 38（4）：627~636
Qiao Fei, Yang Huazhong, Gao Hongli and Wang Hui, “Timing Improvements of Conditional-Precharge Sense-Amplifier-Based Flip-Flop,” Chinese Journal of Electronics (CJE), 2007,16(2):231-235
Fei Qiao, Huazhong Yang, Dingli Wei, Hui Wang, "MODIFIED CONDITIONAL-PRECHARGE SENSE-AMPLIFIER-BASED FLIP-FLOP WITH IMPROVED SPEED," Journal of Circuits, Systems and Computers (JCSC), 2007, 16(2): 199-210.
Fei Qiao, Huazhong Yang, Hui Wang, "Low Power Switched-Capacitor Circuits Powered by AC-Power Supply," Chinese Journal of Semiconductors, vol. 27, No. 12, pp. 2203-2208, 2006.(Chinese Version)
乔飞，杨华中，汪 蕙. 采用交流电源供电的低功耗开关电容电路. 半导体学报, 2006, 27(12): 2203~2208
QIAO Fei, YANG Huazhong, LUO Rong, WANG Hui, "A Single-Power-Supply CMOS Error Amplifier with Wide Power Supply Range," Microelectronics, vol. 34, No. 1, pp. 85-90, Feb. 2004.(Chinese Version)
乔飞，杨华中，罗嵘，汪蕙. 宽工作电压范围单电源CMOS 误差放大器. 微电子学, 2004, 34（1）: 85～90
Conference Papers
Zhengrong Wang, Fei Qiao, Zhen Liu, Yuxiang Shan, Xunyi Zhou, Li Luo, Huazhong Yang, "Optimizing Convolutional Neural Network on FPGA under Heterogeneous Computing Framework with OpenCL," IEEE TENCON 2016, Singapore, 2016, pp. 3437-3442.
Zheyu Liu, Nan Wu, Fei Qiao, Qi Wei, XiaojunGuo, Yongpan Liu, Huazhong Yang, "Computable Flexible Electronics: Circuits Exploring for Image Filtering Accelerator with OTFT," CAD-TFT 2016, Beijing, 2016, pp. 79.
Nan Wu,Z heyu Liu, Fei Qiao, Qi Wei, Xiaojun Guo, Yuan Xie and Huazhong Yang, "A Real-Time and Energy-Efficient Implementation of Difference-of-Gaussian with Flexible Thin-Film Transistors," 2016 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), Pittsburgh, PA, 2016, pp. 455-460.
X. Yang, Y. Xing, F. Qiao, Q. Wei and H. Yang, "Approximate Adder with Hybrid Prediction and Error Compensation Technique," 2016 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), Pittsburgh, PA, 2016, pp. 373-378.
Y. Chen, X. Yang, F. Qiao, J. Han, Q. Wei and H. Yang, "A Multi-accuracy-Level Approximate Memory Architecture Based on Data Significance Analysis," 2016 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), Pittsburgh, PA, 2016, pp. 385-390.
Xueshi Li, Xinghua Yang, Fei Qiao, Qi Wei, Huazhong Yang, "Design of Accuracy Configurable Approximate Multi-latency Multipliers for Quality-Resilient Applications," accepted by ISNE 2016.
Y. Li, F. Qiao, X. Yang, Q. Wei and H. Yang, "A precision-improved processing architecture of physical computing for energy-efficient SIFT feature extraction," 2016 IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP), Shanghai, 2016, pp. 1041-1044.
Zheyu Liu, Fei Qiao, Qi Wei, Xinghua Yang, Yi Li and Huazhong Yang, "An ultra-fast and low-power design of analog circuit network for DoG pyramid construction of SIFT algorithm," 2016 17th International Symposium on Quality Electronic Design (ISQED), Santa Clara, CA, 2016, pp. 392-397.
Xinghua Yang, Fei Qiao, Qi Wei, Huazhong Yang, "A General Scheme for NoiseTolerant Logic Design Based on Probabilistic and DCVS Approaches," New Circuits and Systems Conference (NEWCAS 2015), France, 2015:1-4.
Fei Qiao, Ni Zhou, Yuanchang Chen, Huazhong Yang, "Approximate Computing in Chrominance Cache for Image/Video Processing, " IEEE International Conference on Multimedia Big Data (BigMM2015), Beijing, 2015:180-183.
Yi Li, Fei Qiao, Qi Wei and Huazhong Yang, "Physical Computing Circuit With No Clock to Establish Gaussian Pyramid of SIFT Algorithm," IEEE International Symposium on Circuits and Systems (ISCAS2015), Lisbon, 2015:2057-2060.
Liang Zhang, Fei Qiao, Kunzhi Xie, Li Luo and Huazhong Yang, "A FPGA-Based Real-Time Binocular Stereo Vision System using Adaptive Support-Weight," Accepted by ICEIC 2015, Singapore.
Chang Liu, Xinghua Yang, Fei Qiao, Qi Wei, Huazhong Yang, "Design Methodology for Approximate Accumulator Based on Statistical Error Model," Design Automation Conference (ASP-DAC2015 ), Japan, 2015:237-242.
Xiao Yang, Fei Qiao, Huazhong Yang, "Hardware Realization of Low Complexity Video Encoder within Distributed Video Coding Framework ," The International Conference on Digital Information, Networking, and Wireless Communications (DINWC2014), Czech Republic, 2014:60-67.
Chang Liu, Fei Qiao, Xinghua Yang,Huazhong Yang, "Hardware Acceleration with Pipelined Adder for Support Vector Machine Classifier," Digital Information and Communication Technology and it's Applications (DICTAP), 2014 Fourth International Conference on, Bangkok,2014:13-16.
Shuang Yu, Fei Qiao, Li Luo, Huazhong Yang, "Increasing Compression Ratio of Low Complexity Compressive Sensing Video Encoder with Application-Aware Configurable Mechanism ," The International conference on Communication and Signal Processing (ICCSP2014), India, 2014:995-998.
Lu Shao , Fei Qiao , Feitian Li , Li Luo ,Huazhong Yang, "Library based Image Processing System with Circuit-Switched Reconfigurable Interconnection," International conference on Communication and Signal Processing (ICCSP2014), India, 2014:1045-1049.
Xinghua Yang, Fei Qiao, Chang Liu, Qi Wei and Huazhong Yang, "Design of multi-stage latency adders using detection and sequence-dependence between successive calculations," Circuits and Systems (ISCAS), 2014 IEEE International Symposium on, Melbourne VIC, 2014:998-1001.
Xinghua Yang, Fei Qiao, Chang Liu and Huazhong Yang, "Design of Variable Latency Adder Based On Present and Transitional States Prediction," International workshop on Power and Timing modeling, Optimization and Simulation, Karlsruhe, Germany, 2013:120-125.
Kunzhi Xie, Fei Qiao, Wei Qi and Huazhong Yang, "Smart-Eyes: a FPGA-based smart camera platform with efficient multi-port memory controller," 3rd International Conference on Multimedia Technology（ICMT 2013), China, 2013:1638-1647.
Ni Zhou, Fei Qiao and Huazhong Yang, "A Hybrid Cache Architecture with 2D-based Prefetching Scheme for Image and Video Processing," International conference on Communication and Signal Processing, India, 2013:1092-1096.
Jing Liu, Fei Qiao, Qi Wei and Huazhong Yang, "A Novel Video Compression Method Based on Underdetermined Blind Source Separation," The 7th FTRA International Conference on Multimedia and Ubiquitous Engineering (MUE 2013), Souel, Korea,2013:13-20.
Mingda Yang, Fei Qiao, Qi Wei, Huazhong Yang, "Image Dynamic-Range Enhancement Based on Human Visual Adaption Mechanism," The 7th International Conference on Embedded and Multimedia Computing (EMC-12), Gwangju, Korea, 2012:1-9.
Junjun Ma, Fei Qiao, Huazhong Yang,Hui Wang, "A PVT-Aware and Low Power Pulse-Triggered Flip-Flop," The 7th International Conference on Embedded and Multimedia Computing (EMC-12), Gwangju, Korea, 2012:11-20.
Xi Tian, Fei Qiao, Dong Zaiwang, Liu Yujun, Zhao Yuting, "Design Methodology for Multipliers with Active Leakage and Dynamic Power Reduction," ICCDA 2011, Xi'an China, 2011.
Zidong Du, Bingbing Xia, Fei Qiao, and Huazhong Yang, "System-Level Evaluation of Video Porecessing System Using SimpleScalar-based Multi-core Processor Simulator," in Proc. of 10th ISADS 2011, pp. 256-259, Tokyo and Hiroshima, Japan, March 23-27, 2011.(Oral Presentation)
Ni Zhou, Fei Qiao, Huazhong Yang, and Hui Wang, "Low-Power Off-Chip Memory Design for Video Decoder Using Embedded Bus-Invert Coding," in Proc. of 10th ISADS 2011, pp. 251-255, Tokyo and Hiroshima, Japan, March 23-27, 2011.(Oral Presentation)
Bingbing Xia, Fei Qiao, Huazhong Yang and Hui Wang, "An Efficient Methodology for Transaction-Level Design of Multi-core h.264 Video Decoder," in Proc. of ICCE 2011, pp. 399-400, Las Vegas, USA, 2011.(Oral Presentation)
Chang Li, Fei Qiao and Huazhong Yang, "Low Power Cache Architecture with Security Mechanism," in Proc of ICETC 2010, Shanghai, China, Jun 22-24, 2010.
Bingbing Xia, Fei Qiao, Huazhong Yang, and Hui Wang, "A Fault-tolerant Structure for Reliable Multi-core Systems Based on Hardware-Software Co-design," in Proc of ISQED 2010, San Jose, CA, USA, March 22-24, 2010.
Hongli Gao, Fei Qiao, Huazhong Yang, "Efficient 5/3-DWT Based Embedded Compression Algorithm for H.264 High Definition Decoder, " in Proc. of ICCE 2010 Conference, Las Vegas, USA, 2010. (Oral Presentation)
Fei Qiao, Yuan Zhou, Xiang Xie, and Huazhong Yang, "A Programmable DCO-Based Fast-Locking Clock Generator," in Proc. of ISPACS 2009 Conference, pp. 93-98, Kanazawa, Japan, 2009. (Oral Presentation)
Sisi Tan, Fei Qiao, Bingbing Xia, Huazhong Yang, and Hui Wang, "A Functional Model of SystemC-Based MPEG-2 Decoder with Heterogeneous Multi-IP-Cores and Hybrid-Interconnections Architecture," 2nd International Congress on Image and Signal Processing (CISP 2009), pp. 1-5 , Tianjin, China, 2009. (Oral Presentation)
Hongli Gao, Fei Qiao, Huazhong Yang, "A Lossless Memory Reduction and Efficient Frame Storage Architecture for HDTV Video Decoder," in Proc. Int. ICALIP2008 Confernce, pp. 593-598, Shanghai, China, 2008. (Oral Presentation)
Hongli GAO, Fei QIAO, Dingli WEI, Huazhong YANG, "A Novel Low-Power and High-Speed Master-Slave D Flip-Flop," in Proc. Int. TENCON 2006 Conference, HongKong, 2006. (Oral Presentation)
Yoshitaka Ueda1, Hideki Yamauchi1, Mamoru Mukuno1, Shinji Furuichi1, Mayumi Fujisawa1, Fei Qiao2, and Huazhong Yang2, "Multimedia Application Signal Processor with 6mW at MPEG Decoding Employing Conditional Pre-charged Flip-Flop," IEEE International Solid-State Circuits Conference (ISSCC 2006), NO. 22.7, pp. 413-415, 662, 2006. ( 1. Sanyo; 2. Tsinghua University )
Huazhong YANG, Fei QIAO, Gang Huang, Hui WANG, "A Low-Swing Differential Interface Circuit for High-Speed On-Chip Asynchronous Interconnection," in Proc. Int. ASICON'05 Conference, pp., IEEE, Shanghai, 2005.10.24~27 (Oral Presentation)
Fei QIAO, Huazhong YANG, Hui WANG, "Low Power Switched-Capacitor Circuits Powered By AC-Power Supply," in Proc. Int. ICCCAS'05 Conference, pp. 1075-1078, IEEE, HongKong, 2005.05.27-31 (Oral Presentation).
Fei QIAO, Huazhong YANG, Hui WANG, "Design Of Low Power Buffer Using Driver-array For On-Chip IPs Interconnection," in Proc. Int. ASICON'03 Conference, pp. 1218-1221, IEEE, Beijing, 2003.10.22~24 (Oral Presentation).
京公网安备 11010802027423号