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招生专业 080903-微电子学与固体电子学 080300-光学工程 085208-电子与通信工程 招生方向 集成电路先导工艺技术,193nm浸没式光刻工艺 计算光刻 集成电路工程 教育背景 1994-04--1998-09 德国Max-Planck-Institute for Solid State Research 获博士学位 学位 1998,德国Max-Planck-Institute for Solid State Research 获博士学位 1992,中国科学院电子所 获硕士学位 工作简历 2013-07~现在, 中科院微电子所, 研究员 2009-08~2013-06,美国GLOBALOUNDRIES, Principal Member of Technica Staff 2007-08~2009-07,美国AZ Electronic Materials, Senior Staff Scientist 2001-05~2007-07,Infineon 纽约研发中心, Senior Engineer/Staff Engineer 1998-10~2001-04,美国Oak Ridge National Lab, 博士后/Research Staff Member 教授课程 超大规模集成电路先进光刻理论与应用 专业研讨课 超大规模集成电路先进光刻理论与应用 专利成果 [1] 张利斌,韦亚一. 一种电子显微图像线条宽度和粗糙度的测量方法. 中国:201710279359.0,2017-09-08. [2] 韦亚一,赵利俊,粟雅娟. 一种标准单元库的优化方法及系统,中国:201610173678.9,2016-03-34 [3] 张利斌,韦亚一. 一种线条粗糙度的测量方法及系统,中国:201610645840.2,2016-08-08 [4] 张利斌,韦亚一. 一种光刻工艺窗口的测量方法,中国:201610890095.8,2016-10-12 [5] 董立松,宋之洋,韦亚一. 一种掩膜图形的优化方法、最佳焦平面位置测量方法及系统,中国:201610342206.1,2016-05-20 [6] 苏晓菁,陈颖,段英丽,韦亚一. 一种版图设计规则的优化方法及系统,中国:201610398580.3,2016-06-07 [7] 张利斌,董立松,苏晓菁,韦亚一. 五级衍射光栅结构及其制备方法、晶圆光刻对准方法,中国:201610140129.1,2016-03-11 [8] 张利斌,董立松,苏晓菁,韦亚一. 七级衍射光栅结构及其制备方法、晶圆光刻对准方法,中国:201610140991.2,2016-03-11 [9] 张利斌,韦亚一. 一种自对准双重图形成像方法,中国:201510218532.7,2015-04-30 [10] 张利斌,韦亚一,殷华湘. 一种半导体器件的制造方法,中国:201510325365.6,2015-06-12 [11] 于丽贤,韦亚一,粟雅娟. 一种双重版图的设计方法及系统,中国:201510415365.5,2015-07-15 [12] 董立松,韦亚一,宋之洋. 一种焦面位置测试掩膜版及确定焦面位置的方法及装置,中国:201510474182.0,2015-08-05 [13] 宋之洋,郭沫然,韦亚一,董立松,于丽贤. 一种光源掩模协同优化方法,中国:201510810017.8,2015-11-20 [14] 张利斌,粟雅娟,韦亚一. 一种扫描电子显微图像的三维重构方法,中国:201510891707.0,2015-12-07 [15] L. Subramany, and Y. Wei. Enhancing resolution in lithographic processes using high refractive index materials. 2014, US 0,211,175 [16] Y. Wei. Defect removal process, 2014, US 0,246,605 [17] V. Sargunas, Y. Wei, J. Kim, and S. Kim. Methods of avoiding shadowing when forming source/drain implant regions on 3D semiconductor deveices, 2014, US 0,113,420 [18] Y. Wei, and S. Brandl. Method of Spin Coating a Film of Non-Uniform Thickness, 2010, US 7,662,436 B1 [19] Y. Wei. Patterning masks, methods and systems, 2008, US 0,070,126 [20] Y. Wei. Defect reduction in immersion lithography, 2007, US 0,166,640 A1 [21] S. Schmidt, T. Schafbauer, H. Liu, and Y. Wei. Structure and method for placement, sizing and shaping of dummy structures, 2006, US 7,071,074 B2 [22] J. Lee, D. Lowndes, V. Merkulo, G. Eres, Y. Wei, E. Greenbaum, and I. Lee. Catalyst-Induced Growth of Carbon Nanotubes on Tips of Cantilevers and Nanowires, 2004, US 6,755,956 B2 发表著作 (1) 高等193nm浸没式光刻工艺, Advanced processes for 193nm immersion lithography, 美国SPIE Press, 2009-02, 第 1 作者 (2) 超大规模集成电路先进光刻理论与应用, 科学出版社, 2016-06, 第 1 作者 科研项目 ( 1 ) 90nm前道匀胶显影机, 主持, 国家级, 2012-01--2015-12 ( 2 ) 14nm光刻仿真优化和光刻技术研究, 主持, 国家级, 2016-01--2018-12 ( 3 ) 22nm FDSOI 光刻技术和OPC研究, 主持, 国家级, 2017-01--2019-12 ( 4 ) 5nm光刻技术方案与设计规则优化, 主持, 国家级, 2017-01--2020-12 ( 5 ) 国 产计算光刻系统性能评估, 主持, 国家级, 2017-01--2020-12 ( 6 ) 下一技术节点三维存储器的光刻方案研究, 主持, 院级, 2018-01--2020-12 ( 7 ) X射线衍射光谱与成像纳米器件集成制造, 参与, 国家级, 2017-07--2022-06 ( 8 ) EUV光刻仿真联合实验室, 主持, 省级, 2018-08--2020-07 ( 9 ) 中关村开放实验室 2017 补助项目, 主持, 省级, 2017-09--2018-08 ( 10 ) 0.18um BiCMOS/BCD OPC工艺开发, 主持, 院级, 2018-05--2019-12 参与会议 [1] Xiaojing Su, Lisong Dong, Jiaxin Lin, Ying Chen, Yayi Wei, Tianchun Ye, Chunshan Du, Feng Shao, Liguo Zhang, Yu Zhu. Hotspots fixing flow in NTD process by using DTCO methodology at 10nm metal 1 layer [C]. Proc. SPIE., 10148: 1014817, 2017. [2] Lisong Dong, Wenhui Chen, Xiaojing Su, Yayi Wei. Improving the topography performance of ion implantation resist [C]. Proc. SPIE., 10147: 101471E, 2017. [3] Libin Zhang, Yaobin Feng, Lisong Dong, Xiaojing Su, Zhengguo Tian, Chao Fang, Yayi Wei, Tianchun Ye. New alignment mark design structures for higher diffraction order wafer quality enhancement [C]. Proc. SPIE., 10145: 101452C, 2017. [4] Lijun Zhao, Ying Chen, Xiaojing Su, Yajuan Su, Yayi Wei, Tianchun Ye. Enhancing Manufacturability of Standard Cells by Using DTCO Methodology [C]. Proc. SPIE, 10148: 101481G, 2017. [5] Taian Fan, Lisong Dong ,Yayi Wei. Applications of RCWA on EUV mask optics [C]. Proc. SPIE. 10450: 104501X, 2017. [6] Libin Zhang, Lisong Dong, Xiaojing Su, Yansong Liu, Lijun Zhao, Yajuan Su, Yayi Wei, Tianchun Ye. An offline roughness evaluation software and its application in quantitative calculation of wiggling based on low frequency power spectrum density method [C]. 2017 China Semiconductor Technology International Conference, Shanghai, 2017, pp. 1-4. [7] L. Yu, Y. Wei, Y. Su, X. Su, Z. Song, M. Quo, and Y. Duan. Effective solution for the 14nm node multiple patterning lithography [C]. China Semiconductor Technology International Conference. 2016. [8] L. Dong, Z. Song, X. Su, and Y. Wei. A novel mask structure for measuring the defocus of scanner [C]. Proceedings of SPIE, 2016, 9778: 97782A. [9] Y. Duan, X. Su, Y. Chen, Y. Su, Y. Wei, F. Shao, R. Zhang, and J. Lei. Design technology co-optimization for 14/10nm Metal1 double patterning layer [C]. Proceedings of SPIE, 2016, 9778: 9781: 97810X. [10] Y. Duan, X. Su, Y. Chen, Y. Su, Y. Wei, F. Shao, R. Zhang, and J. Lei. Design technology co-optimization for N14 Metal1 layer [C]. China Semiconductor Technology International Conference. 2016. [11] X. Su, Y. Su, Y. Liu, F. Chen, Z. Liu, W. Zhang, B. Li, T. Gao, and Y. Wei,. Thickness optimization for lithography process on silicon substrate [C]. Proceedings of SPIE, 2015, 9425:94251Z. [12] Y. Liu, X. Su, L. Dong, Z. Song, M. Guo, Y. Su, and Y. Wei. Focus shift impacted by mask 3D and comparison between Att. PSM and OMOG [C]. Proceedings of SPIE, 2015, 9426: 94261H. [13] Y. Wei, C. Zhao, and T. Ye. Analysis of mix-and-match litho approach for manufacturing 20nm logic-node products [C]. Proceedings of SPIE, Alternative Lithographic Technologies VI, 2014, 9049: 90491Y. [14] B. Jeon, S. lee; L. Subramany, C. Li, S. Pal, S. Meyers, S. Mehta, Y. Wei, and D. Cho. Evaluation of Lens Heating Effect in High Transmission NTD Processes at the 20nm Technology Node [C]. Proceedings of SPIE, Metrology, Inspection, and Process Control for Microlithography XXVIII, 2014, 9050: 90501U. [15] C. Lee, S. Mehta, W. Hwang, H. Tsai, M. Anderson, Y. Wei, M. Herrick, X. Hu, B. Jeon, and S. Pal. 20nm VIA BEOL patterning challenges [C]. Proceedings of SPIE, Advances in Resist Materials and Processing Technology XXX, 2013, 8682: 86820D. [16] B. Jeon, S. Pal, S. Mehta, S. Lokesh, Y. Jiang, C. Li, M. Yelverton, and Y. Wei. High Order Wafer Alignment for 20nm node Logic Process [C]. Proceedings of SPIE, 27th Conference on Metrology, Inspection, and Process Control for Microlithography, 2013, 8681: 868110. [17] M. Hu, G. Jellison, A. Debaillie, and Y. Wei. Chemical‐Solution Deposition of Hafnia Films on Self‐Assembled Molecular Monolayers: Part D ‐ Precipitation Behavior in Bulk Solutions [C]. Ceramic Nanomaterials and Nanotechnologies IV, 2012. [18] C. Lee, Y. Wei, M. Kelling, S. Law, M. Mobley, and K. Chai. Defects reduction at BEOL interconnect within 300mm manufacturing environment [C]. Proceedings of SPIE, Optical Microlithography XXV, 2012, 8326: 83261S. [19] Y. Wei, M. Glodde, H. Yusuff, M. Lawson, S. Y. Chang, K. S. Yoon, and M. Kelling. Performance of tri-layer process required for 22 nm and beyond [C]. Proceedings of SPIE, Advances in Resist Materials and Processing Technology XXVIII, 2011, 7972: 79722L. [20] R. Zhang, A. Timko, J. Zook, Y. Wei, L. Pylneva, Y. Yi, C. Li, H. Wu, D. Rahman, D. Mckenzie, C. Anyadiegwu, P. Lu, M. Neisser, R. Dammel, R. Bradbury, and T. Lee. Reworkable Spin-on Trilayer Materials: Optimization of Rework Process and Solutions for Manufacturability [C]. Proceedings of SPIE, Advances in Resist Materials and Processing Technology XXVI, 2009, 7273: 72732O. [21] Y. Wei, S. Brandl, and F. Goodwin. Formation mechanism of 193nm immersion defects and defect reduction strategies [C]. Proceedings of SPIE, Advances in Resist Materials and Processing Technology XXV, 2008, 6923: 69231Y. [22] Y. Wei. Bubble and antibubble defects in 193i lithography [C]. Spienewsroom, 2008. [23] Y. Wei. Extendability of 193nm immersion lithography [C]. Spienewsroom, 2008. [24] Y. Wei, and D. Back. Mastering the resist-leaching and aqueous-contact-angle challenges [C]. Spienewsroom, 2007. [25] Y. Wei, and D. Back. 193nm immersion lithography: Status and challenges [C]. Spienewsroom, 2007. [26] Y. Wei, and D. Back. Immersion lithography: topcoat and resist processes [C]. Spienewsroom, 2007. [27] Y. Wei, M. Bender, W. Domke, A. Laessig, M. Sebald, S. Trogisch, and D. Back. Performance of chemically amplified resists at half-pitch of 45 nm and below [C]. Proceedings of SPIE, Advances in Resist Materials and Processing Technology XXIV, 2007, 6519: 65190R. [28] Y. Wei, K. Petrillo, S. Brandl, F. Goodwin, P. Benson, R. Housley, and U. Okoroanyanwu. Selection and evaluation of developer-soluble topcoat for 193nm immersion lithography [C]. Proceedings of SPIE, Advances in Resist Materials and Processing XXIII, 2006, 6153: 615306. [29] Y. Wei, N. Stepanenko, A. Laessig, et al. Evaluation of 193nm immersion resist without topcoat [C]. Proceedings of SPIE, Advances in Resist Materials and Processing XXIII, 2006, 6153: 615305. [30] S. Brandl, R. Watso, B. Pierson, S. Holmes, Y. Wei, K. Petfillo, K. Cummings, and F. Goodwin. Investigation of immersion related defects using pre-and post-wet experiments [C]. Proceedings of SPIE, Optical Microlithography XIX, 2006, 6154:61540T. [31] Y. Wei, N. Stepanenko, M. Sebald, C. Hohle, F. Houlihan, and R. Sakamuri. Study of 157 nm resists with full field exposure tools[C]. Proceedings of SPIE, Advances in Resist Materials and Processing XXII, 2005, 5753: 572-583. [32] S. Brandl, R. Housley, P. Benson, F. Goodwin, Y. Wei, C. Robinson, and K. Cummings. Immersion Defect Studies [C]. SEMATECH 2nd 193nm Immersion Symp. 2005. [33] J. Weis, Y. Wei, K. Klitzin, and K. Eberl. Resolving Edge Strips in the Quantum Hall Regime[C]. APS March Meeting. APS March Meeting Abstracts, 1998. [34] Y. Wei, G. Zheng, and Y. He. Interfacial deep levels in nano-crystalline silicon films [C]. Proceedings of SPIE, Second International Conference on Thin Film Physics and Applications, 1994, 2364:373-375. [35] G. Zheng, Y. Wei, S. Guo, Y. Chen, and S. Mao. Magnetoresistance oscillation of Si delta-doping GaAs multiple quantum well [C]. Thin Film Physics and Applications: Second International Conference. International Society for Optics and Photonics, 1994:65-68.

研究领域

193nm浸没式光刻工艺; 计算光刻; 光刻材料研发; 光刻设备研发

近期论文

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[1] Lisong Dong, Wenhui Chen, Taian Fan, Xiaojing Su, Yayi Wei, Tianchun Ye. Mitigating the influence of wafer topography on implantation process in optical lithography [J]. Optics Letter, 42(15): 1-4. 2017. [2] Libin Zhang, Lisong Dong, Xiaojing Su, Yayi Wei, Tianchun Ye. New alignment mark designs in single patterning and self-aligned double patterning [J]. Microelectronic Engineering, 179: 18-24, 2017. [3] Libin Zhang, Lisong Dong, Xiaojing Su, and Yayi Wei. Characteristic study of image-based alignment for increasing accuracy in lithography application [J]. J. Vac. Sci. Technol. B. 35(6): 061601, 2017. [4] Lisong Dong, Libin Zhang, Xiaojing Su, Jianfang He, Yayi Wei. Optimize the focus monitor mark in immersion lithography according to illumination type [J]. J. Micro/Nanolith. MEMS MOEMS, 16(3): 033505, 2017. [5] Lijun Zhao, Lisong Dong, Wenhui Chen, Yayi Wei, Tianchun Ye, Liwan Yue, Yuntao Jiang, Qiang Wu. Necessity of Resist Model in Source Mask Optimization for Negative Tone Development Process [J]. J. Micro/Nanolith. MEMS MOEMS, 16(3): 033509, 2017. [6] 陈文辉,何建芳,董立松,韦亚一. 光源掩模协同优化的原理与应用 [J]. 半导体技术,42(9): 641-649, 2017. [7] L. Zhao, Y. Wei, and T. Ye. Analysis of multi-e-beam lithography for cutting layers at 7-nm node [J]. Journal of Micro/nanolithography Mems & Moems, 2016, 15(4). [8] M. Guo, Z. Song, Y. Feng, Z. Tian, Q. Cao, and Y. Wei. Efficient source mask optimization method for reduction of computational lithography cycles and enhancement of process-window predictability [J]. Journal of Micro/ Nanolithography Mems & Moems, 2015, 14(4). [9] 宋之洋,郭沫然,苏晓菁,刘艳松,粟雅娟,韦亚一. 一种离线光学邻近效应匹配方法的研究和仿真 [J]. Micronanoelctronic Technology, 2015, 52(3): 197-203. [10] L. Meng, J. Gao, X. He, J. Li, and Y. Wei. CMOS-Compatible Top-Down Fabrication of Periodic SiO2 Nanostructures using a Single Mask [J]. Nanoscale Research Letters, 2015, 10(1):1-7. [11] 韦亚一, 粟雅娟, 刘艳松. 先导光刻中的光学邻近效应修正[J]. 微纳电子技术, 2014, 51(3) :186-193. [12] Y. Wei and D. Cho. An analysis of lithography solutions to 10 nm logic node and beyond [J]. Future-Fab International, 2013, 46(1): 44-49. [13] Y. Wei and M. Kelling. Overlay control beyond 20nm node and challenges to EUV lithography [J]. Future-Fab International, 2011, 39(1). [14] J. Choi, C. Wang, Y. Wei, E. Zielinski, W. Tseng, Y. Moon, M. Kelling, and L. Economikos. Planarization Specification for 22nm and Beyond BEOL CMP [J]. MRS Proceedings, 2010, 1249. [15] Y. Wei, S. Brandl, F. Goodwin, and D. Back. 193nm Immersion-Related Defects and Strategies of Defect Reduction [J]. Future-Fab International, 2007. [16] K. Petrillo, Y. Wei, R. Brainard, G. Denbeaux, D. Goldfarb, C. S. Koay, and O. Wood. Are extreme ultraviolet resists ready for the 32 nm node? [J]. Journal of Vacuum Science & Technology B, 2007, 25(6): 2490-2495. [17] Y. Wei, K. Petrillo, and P. Benson. Evaluating topcoat options for immersion litho resists [J]. Solid State Technology, 2006, 49(7):73-78. [18] Y. Wei, N. Stepanenko, A. Laessig, L. Voelkel, and M. Sebald. Evaluation of 193-nm immersion resist without topcoat [J]. Journal of Micro/Nanolithography, MEMS, and MOEMS, 2006, 5(3), 033002-033002-8. [19] M. Hu, A. Debaillie, Y. Wei, and G. Jellison. Chemical-Solution Deposition of Hafnia Films on Self-Assembled Molecular Monolayers [J]. Current Nanoscience, 2006, 2(1):13-32. [20] Y. Wei, G. Eres, V. Merkulov, and D. Lowndes. Effect of catalyst film thickness on carbon nanotube growth by selective area chemical vapor deposition [J]. Applied Physics Letters, 2001, 78(10):1394-1396. [21] Y. Lee, D. Norton, J. Budai, and Y. Wei. Enhanced Ultraviolet Photoconductivity in Semiconducting ZnGa2O4Thin Films [J]. Journal of Applied Physics, 2001, 90(8):3863-3866. [22] J. Weis, Y. Wei, and K. Klitzing. Single-electron transistor probes two-dimensional electron system in the quantum Hall regime [J]. Microelectronic Engineering, 1999, 47(1-4):17-21. [23] Y. Wei, J. Weis, K. Klitzing, and K. Eberl. Edge strips in the quantum hall regime imaged by a single-electron transistor [J]. Physical Review Letters, 1998, 81(8): 1674-1677. [24] J. Weis, Y. Wei, and K. Klitzing. Probing the depletion region of a two-dimensional electron system in high magnetic fields [J]. Physica B Condensed Matter, 1998, 258(6):1-7. [25] Y. He, Y. Wei, G. Zheng, M. Yu, and M. Liu. An exploratory study of the conduction mechanism of hydrogenated nanocrystalline silicon films [J]. Journal of applied physics, 1997, 82(7): 3408-3413. [26] Y. Wei, G. Zheng, J. Shen, et al. Weak Localizatinn of Low Compensated n-Hg_(1-x) Cd_xTe [J]. Chinese Journal of Semiconductors, 1995. [27] Y. Wei, G. Zhen, and Y. He. Study on Conductivities of nc-Si:H Films [J]. Journal of Functional Materials, 1994. [28] Y. Wei, G Zheng, S Guo, and D. Tang. Magnetic field induced metal-insulator transition and thermally activated electronic transport in low compensated n-Hg1-xCdxTe [J]. Acta Physica Sinica, 1994. [29] Y. Wei, J. Shen, G. Zheng, S. Guo, D. Tang, Z. Peng, and Y. Zhang. Study on SdH oscillation of 2-D electron gas in Si δ-doped AlxGa1-xAs/GaAs heterojunction [J]. Acta Physica Sinica, 1994, 43(2):282-288. [30] Y. Wei, and Z. Tao. Optimal Design of the MCP Inclined Angle [J]. Infrared Technology, 1994. [31] R. Jiang, J. Liu, Y. Zheng, G. Zheng, Y. Wei, and X. Shen. High Hole Mobility Si/Si1-xGex/Si Heterostructure [J]. Chinese Physics Letters, 1994, 11(2):116-118. [32] Y. Wei and Z. Tao. The Causes of Large Degassing of MCP [J]. Infrared Technology, 1993. [33] Y. Wei and Z. Tao. Theoretical analysis of MCP noise factor [J]. Journal of Electronics, 1993, 15(6): 655-658. [34] Y. Wei. Study of the surface structure of lead silicate glass reduced by hydrogen [J]. Journal of Electronics & Information Technology, 1992. [35] Y. Wei. Theoretical analysis of MCP self-saturation effect [J]. Journal of Applied Optics, 1992. [36] J. Deng, and Y. Wei. Noise caused by nature radioactive isotopic elements contained in MCP [J]. Journal of Electronics & Information Technology, 1992

学术兼职

2013-09-01-今,全国标准化专业技术委员会微光刻分会, 委员 2013-09-01-今,中国半导体技术国际会议 (CSTIC)光刻技术委员会, 委员 2013-07-01-今,沈阳芯源微电子设备公司, 副总经理

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