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1. Weiwu Hu, Ru Wang, Yunji Chen, etc. Godson-3B: A 1GHz 40W 8-Core 128GFlops Processor in 65nm CMOS. International Solid-State Circuits Conference(ISSCC’2011)
2. Qi Guo, Tianshi Chen, Haihua Shen, Yunji Chen and Weiwu hu ,Empirical Design Bugs Prediction for Verification, Design, Automation and Test in Europe（Date’2011）
3. Yunji Chen, Weiwu Hu, Tianshi Chen, Ruiyang Wu, LReplay: A Pending Period Based Deterministic Replay Scheme, Proc. Of 37th ACM/IEEE International Symposium on Computer Architecture(ISCA 2010) （EI）
4. Menghao Su, Yunji Chen, and Xiang Gao, A General Method to Make Multi-Clock System Deterministic, Proc. of Design, Automation, and Test in Europe (DATE'10), 2010（EI）
5. Dan Tang, Yungang Bao, Weiwu HU, Mingyu Chen, DMA Cache: Using On-Chip Storage to Architecturally Separate I/O Data from CPU Data for Improving I/O Performance, the 16th International Symposium on High Performance Computer Architecture(HPCA’10)（EI）
6. Yunji Chen, Yi Lv, Weiwu Hu, Tianshi Chen, Haihua Shen, Pengyu Wang, Hong Pan. Fast Complete Memory Consistency Verification. The 15th International Symposium on High-Performance Computer Architecture (HPCA2009) （EI）
7. Weiwu Hu, Jian Wang, Xiang Gao, Yunji Chen, Qi Liu, Guojie Li，Godson-3: A Scalable Multi-core RISC Processor with X86 Emulation Support，IEEE Micro, Vol. 29, No. 2, March 2009 （EI）
8. Weiwu Hu, Qi Liu, Jian Wang, Songsong Cai,etc, Efficient Binary Translation System with Low Hardware Cost, IEEE International Conference on Computer Design, 2009（EI）
9. Weiwu Hu, Jian Wang, Xiang Gao, Yunji Chen, Micro-architecture of Godson-3 Multi-Core Processor, hot chips 2008
10. Weiwu Hu, Jian Wang, Making Effective Decisions in Computer Architects’ Real-World: Lessons and Experiences with Godson-2 Processor Designs, Journal of Computer Science and Technology, 23(4): 620-632 July 2008（SCI Index）
11. Weiwu Hu, Jiye Zhao, Shiqiang Zhong, Xu Yang, Elio Guidetti, Chris Wu, Implementing a 1GHz Four-issue Out-of-Order Execution Microprocessor in a Standard Cell ASIC Methodology, Journal of Computer Science and Technology,22(1):1-14, January 2007（SCI Index）
12. Weiwu Hu, Rui Hou, Junhua Xiao, Longbing Zhang, High performance general-purpose microprocessors: Past and future，Journal of Computer Science and Technology, 21(5):631-640, September 2006（SCI Index）
13. 胡伟武，张福新，李祖松，龙芯2号处理器设计和性能分析，计算机研究与发展，43（6）：959-966，2006（EI收录）
14. 7 Weiwu Hu, Fuxin Zhang, Zusong Li, Microarchitecture of the Godson-2 processor. Journal of Computer Science and Technology, 20(2):243-249, 2005.2.（SCI Index）
15. 胡伟武，唐志敏，龙芯1号处理器结构设计，计算机学报，2003，26(4): 385-394(EI收录)
16. Hu Weiwu, Zhang Fuxin, Liu Haiming, Dynamic data prefetching in home-based software DSMs, Journal of Computer Science and Technology, 16 (3): 231-241, 2001 (SCI收录)
17. Hu Weiwu, Zhang Fuxin, and Liu Haiming. Optimizing Home-based Software DSM Protocols, Cluster Computing, 4(3), 2001.
18. Hu Weiwu, Shi Gang, and Zhang Fuxin. Communication With Threads in Software DSMs, in Proceedings of the 2001 International Conference on Cluster Computing, Oct., 2001.
19. Hu Wei, Zhang Fuxin, Liu Haiming. A new home-based software DSM protocol for SMP clusters, EURO-PAR 2000 PARALLEL PROCESSING, PROCEEDINGS, 1900: 1132-1142 2000(SCI收录)
20. Hu, Weiwu, Li Ren, Zhang Fuxin, Shi Weisong, and Tang Zhimin. Running Real Applications in Home-Based Software DSMs, in Proceedings of HPC-Asia 2000, pp. 148-153, may 2000
21. Hu Weiwu, Shi Weisong, Tang Zhimin. Write detection in home-based software DSMs，EURO-PAR’99, PARALLEL PROCESSING, 1685: 909-913 1999(SCI收录、ISTP收录)
22. Hu Weiwu, Shi Weisong, Tang Zhimin. JIAJIA: A software DSM system based on a new cache coherence protocol, HIGH-PERFORMANCE COMPUTING AND NETWORKING, PROCEEDINGS, 1593: 463-472,1999(SCI收录)
23. 胡伟武，施巍松，唐志敏，基于新型Cache一致性协议的共享虚拟存储系统，计算机学报,1999, 20(5): 467-475 (EI收录)
24. Hu Weiwu，Shi Weisong, Tang Zhimin. Adaptive write detection in home-based software DSMs, In: Proc. of IEEE International Symposium on High Performance Distributed Computing, 1999, 353-354(EI收录)
25. Hu Weiwu, Shi Weisong, Tang Zhimin. Reducing system overheads in home-based software DSMs, In : Proc. of the International Parallel Processing Symposium, IPPS, 1999, 167-173(EI收录、ISTP收录)
26. Hu Weiwu, Shi Weisong, and Tang Zhimin. Home Migration in Home-Based Software DSMs, in Proceedings of the 1st Workshop of the Software Distributed Shared Memory, pp. 21-26, Rhodes, June, 1999
27. Hu Weiwu, Reducing Message Overhead in Home-Based Software DSMs, in Proceedings of the 1st Workshop of the Software Distributed Shared Memory, pp. 7-11, Rhodes, June, 1999.
28. Hu Weiwu, Shi Weisong, Tang Zhimin, Li Ming, Lock-based cache coherence protocol for scope consistency, Journal of Computer Science and Technology, 13(2): 97-109, 1998(EI收录)
29. Hu Weiwu, Shi Weisong, Tang Zhimin. Framework of memory consistency models, Journal of Computer Science and Technology, 13(2):110-124, 1998(EI收录)
30. Hu Weiwu, Xia Peisu. Out-of-order execution in sequentially consistent shared-memory systems: theory and experiments, Journal of Computer Science and Technology, 13(2):125-139, 1998(EI收录)
31. Hu Weiwu, Xia Peisu. Hardware-controlled prefetching in directory-based cache coherent systems, In: Proc. of Frontiers of Massively Parallel Computation, 1996, 206-213(EI收录、ISTP收录)
32. Hu Weiwu, Xia, Peisu. event ordering condition for correct executions in shared-memory systems, In: Proc. of the International Symposium on Parallel Architectures, Algorithms and Networks, I-SPAN, 1996, 84-89(EI收录、ISTP收录)
33. Hu Weiwu, Improving the Performance of Sequential Consistency in Cache Coherence Systems, In Proceedings of the 1995 International Conference on High Performance Computing, pp. 81-86, New Delhi, Dec. 1995
34. Hu Weiwu. Graph model for investigating memory consistency, In: Proc. of the Internatoinal Conference on Parallel and Distributed Systems - ICPADS, 1994, p 516-523(EI收录)
35. Weiwu Hu and Zhimin Tang, A Maximum Time Difference Pipelined Multiplier, In Proceedings of the first International Conference on ASIC,pp.360-365, Beijing, Oct.1994
36. 张福新，章隆兵，胡伟武，唐志敏，可恢复的软件DSM系统JIACKPT，软件学报, 16(2):165-173, 2005.2(EI收录)
37. Zhang Ge, Qi Zichu, Hu Weiwu. A Novel Design of Leading Zero Anticipation Circuit With Parallel Error Detection. IEEE International Symposium on Circuits and Systems (ISCAS 2005), 2005.05, pp.676-679 Vol. 1.
38. Hou Rui, Zhang Fuxin, Hu Weiwu. A Memory Bandwidth Effective Cache Store Miss Policy. In: Proc. of the 10th Asia-Pacific Computer Systems Architecture Conference (ACSAC’2005), October, 2005（SCI收录）
39. 吴少刚,章隆兵,蔡飞,胡伟武, 一种适用于机群OpenMP系统的有效调度算法, 计算机研究与发展,41(7):1298-1305,2004年7月(EI收录)
40. 章隆兵,吴少刚,蔡飞,胡伟武, 适合机群OpenMP系统的制导扩展, 计算机学报,27(8):1129-1136,2004年8月(EI收录)
41. 章隆兵,吴少刚,蔡飞,胡伟武, PC机群上共享存储与消息传递的比较,软件学报,15(6):842-849,2004年6月(EI收录)
42. Liu Haiming, Hu Weiwu. A Comparison of Two Strategies of Dynamic Data Prefetching in Software DSM, In: Proc. of IPDPS 2001,2001
43. 唐志敏，施巍松，胡伟武，曙光1000A上消息传递与共享存储的比较, 计算机学报，23(2):134-140, 2000(EI收录)
44. Shi Weisong, Hu Weiwu, Tang Zhimin. Where does the time go in software DSMs? - experiences with JIAJIA, Journal of Computer Science and Technology, 14（3）：193-205, 1999 (EI收录)
45. Eskicioglu M. Rasit，Marsland T. Anthony，Hu Weiwu，Shi Weisong. Evaluation of the JIAJIA software DSM system on high performance computer architectures, In: Proc. of the Hawaii International Conference on System Sciences, 1999, 287 (EI收录)
46. Shi Weisong, Hu Weiwu, Tang Zhimin, Eskicioglu M. Rasit. Dynamic task migration in home-based software DSM systems, In: Proc. of IEEE International Symposium on High Performance Distributed Computing, 1999, 339-340 (EI收录)
47. Shi Weisong, Hu Weiwu, Tang Zhimin. An Interaction of Coherence Protocols and Memory Consistency Models in DSM Systems, Operating Systems Review (ACM), 31(4):41-54, 1997 (EI收录)
48. Shi Weisong, Hu Weiwu, etc. An Innovative Implementation for Directory-based Cache Coherence in Shared Memory Multiprocessors, Computer Architecture News, 25(5):2-, 1997, (EI收录)
49. Dandan Huan, Zusong Li, Weiwu Hu, Zhiyong Liu, Processor Directed Dynamic Page Policy, 11th Asia-Pacific Computer System Architecture Conference (ACSAC2006) pp.109-122. (SCI收录)
50. Zusong Li, Xianchao Xu, Weiwu Hu, and Zhimin Tang. Microarchitecture and Performance Analysis of Godson-2 SMT Processor. Proceedings of the 24th International Conference on Computer Design (ICCD), San Jose, California, USA, October 2-4, 2006, pp. 485-490(EI收录)
51. Rui Hou, Longbing Zhang, Weiwu Hu. A hybrid hardware/software generated prefetching thread mechanism on chip multiprocessors. In: Proceeding of 12th Euro-Par Parallel Processing Conference, 2006, 506-516(SCI收录)
52. Ge Zhang, Weiwu Hu, Zichu Qi, Parallel error detection for leading zero anticipation, Journal of Computer Science and Technology，21(6):901-906,2006(SCI收录)
53. 张戈，齐子初，胡伟武，龙芯2号处理器功能部件设计，计算机研究与发展，43(6):967-973(EI收录)
54. 陈云霁，马麟，沈海华，胡伟武，龙芯2浮点除法运算电路形式验证，计算机研究与发展，43(10):1835-1841, 2006(EI收录)
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