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个人简介

汪洋,女,1981年生,博士,副教授,硕士生导师,2015年6月获湘潭大学理学博士学位。研究兴趣为高压高防护级别ESD/TVS器件结构设计及机理研究、器件级和电路级建模、TCAD工艺及器件仿真方法研究、全芯片ESD防护设计。完成湖南省教育厅资助一般项目1项,目前,主持湘潭大学博士科研启动项目在研1项,参与国家自然科学基金项目1项。以第一作者发表论文8篇,其中SCI收录4篇、EI收录3篇、获湖南省仪器仪表学会优秀论文一等奖1篇。获集成电路布图设计登记4项,申请发明专利2项,申请实用新型专利1项,授权实用新型专利1项。 主讲课程 [1] VHDL硬件描述语言与复杂数字系统设计 [2] 微电子工艺原理 [3] 集成电路工艺与器件 [4] 微电子科学与工程专业导学

研究领域

静电防护器件、瞬态电压抑制器件、TVS器件的片上集成

近期论文

查看导师新发文章 (温馨提示:请注意重名现象,建议点开原文通过作者单位确认)

[1] Yang Wang,Xiangliang Jin,Acheng Zhou,Liu Yang,Cathode Side Engineering to Raise Holding Voltage of SCR in a 0.5-μm 24V CDMOS Process,Journal of Semiconductor Technology and Science,2015,15(6):601-607。 [2] Yang Wang,Xiangliang Jin,Liu Yang,Robust LDMOS with Interleaved Bulk and Source for High-Voltage ESD Protection,IET Power Electronics,2015,8(11):2251-2256。 [3] Yang Wang,Xiangliang Jin,Liu Yang,Qi Jiang,Huihui Yuan,Robust dual-direction SCR with low trigger voltage, tunable holding voltage for high-voltage ESD protection,Microelectronics Reliability,2014,55(2014):520-526。 [4] WANG Yang ,JIN Xiang-liang ,ZHOU A-cheng,Novel LDNMOS embedded SCR with strong ESD robustness based on 0.5 μm 18 V CDMOS technology,J. Cent. South Univ.,2014,22(2014):552-559。 [5] 汪洋,周阿铖,朱科翰,金湘亮,18VLDMOS器件ESD电流非均匀分布的模拟和测试分析,固体电子学研究与进展,2012,32(3):269-274。 [6] Yang Wang ,Xiangliang Jin ,Acheng Zhou,Liu Yang,Improvement on ESD Robustness of LDMOS by Bulk and Source Interleaved Dotting,2014 IEEE International Conference on Electron Devices and Solid-State Circuits (EDSSC2014),2014.6.18-2014.6.20。 [7] Yang Wang ,Xiangliang Jin ,Huihui Yuan,Qi Jiang,Liu Yang,Investigation of layout effect on ESD performance of SCR-NLDMOS device,2014 IEEE 12th International Conference on Solid-State and Integrated Circuit Technology,2014.10.28-2014.10.31。 [8] Yang Wang ,Acheng Zhou,Xiangliang Jin ,Design and analysis of dual direction SCR ESD devices in 0.5μm 5V/18V CDMOS technology,2012 International Conference on Electronic Information and Electrical Engineering,2012.6.15-2012.6.17。 [9] Yongming Yan,Yang Wang,Yun Zeng,Xiangliang Jin,Layout geometry impact on nLDMOS devices for high-voltage ESD protection,Electronics Letters,2015,51(23):1902-1904。 [10] Liu Yang,Yang Wang,Acheng Zhou,Xiangliang Jin ,Design, fabrication and test of novel LDMOS-SCR for improving holding voltage,Solid-State Electronics,2014,103(2015):122-126。 [11] Acheng Zhou,Yang Wang,Kehan Zhu,Xiangliang Jin ,Investigation of pickup effect for multi-fingered ESD devices in 0.5 um 5V/18V CDMOS process,Electronics Letters,2012,48(15):911-913。 [12] Qi Jiang,Huihui Yuan,Yang Wang,Xiangliang Jin ,Design and analyze of transient-induced latch-up in RS485 transceiver with on-chip TVS,Microelectronics Reliability,2015,55(2015):637-644。

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