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个人简介

教育经历 2013-2017:香港科技大学,电子与计算机工程系,博士学位 2009-2013:清华大学,数学物理基础科学班,学士学位 工作经历 2018.09-至今:南方科技大学,电子与电气工程系,助理教授 2017.09-2018.09: 香港科技大学,电子与计算机工程系,博士后

研究领域

宽禁带半导体器件 氮化镓电⼒电⼦器件 半导体器件⼯艺 半导体器件物理 可靠性 功率集成电路 新一代小型化电源应用

近期论文

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Jiang, L. Li, C. Wang, J. Ma, Z. Liu, and M. Hua*, “Gate-stress Induced Threshold Voltage Instability in GaN HEMT with PNJ-gate”, IEEE Transactions on Electron Devices, vol. 69, no. 7, pp. 3654-3659, July 2022, doi: 10.1109/TED.2022.3177397. Jiang, M. Hua*, X. Huang, L. Ling, C. Wang, J. Chen and Kevin J. Chen, "Negative Gate Bias Induced Dynamic ON-Resistance Degradation in Schottky-Type p-Gan Gate HEMTs," IEEE Transactions on Power Electronics, vol. 37, no. 5, pp. 6018-6025, May 2021, doi: 10.1109/TPEL.2021.3130767. Zhao, J. Byggmästar, Z. Zhang, F. Djurabekova, K. Nordlund, and M. Hua*, “Phase transition of two-dimensional ferroelectric and paraelectric Ga2O3monolayers: A density functional theory and machine learning study”, Phys. Rev. B, vol. 104, no. 5, p. 054107, Aug. 2021, doi: 10.1103/PhysRevB.104.054107. Hua*, J. Chen, C. Wang, L. Liu, L. Li, J. Wei, L. Zhang, Z. Zheng, and Kevin J. Chen, "E-mode p-FET-bridge HEMT: Toward high VTH, low reverse-conduction loss and enhanced stability," in 2021 IEEE 14thInternational Conference on ASIC (ASICON), 2021, pp. 1-4, doi: 10.1109/ASICON52560.2021.9620369 (invited talk) Jiang, M. Hua*, X. Huang, L. Li, J. Chen and K. J. Chen, "Impact of OFF-state Gate Bias on Dynamic RONof p-GaN Gate HEMT," in 2021 33rd International Symposium on Power Semiconductor Devices and ICs (ISPSD), 2021, pp. 47-50, doi: 10.23919/ISPSD50666.2021.9452256. Zhao, H. Huang, Y. Yin, Y. Liao, H. Mo, Q. Qian, Y. Guo, X. Chen, Z. Zhang, and M. Hua*, "Two-Dimensional Gallium Oxide Monolayer for Gas-Sensing Application," The Journal of Physical Chemistry Letters, 2021, vol. 12, pp. 5513-5820, doi: 10.1021/acs.jpclett.1c01393. (cover letter) Chen, M. Hua*, C. Wang, L. Liu, L. Li, J. Wei, L. Zhang, Z. Zheng, and Kevin J. Chen, “Decoupling of Forward and Reverse Turn-on Threshold Voltages in Schottky-Type p-GaN Gate HEMTs”, IEEE Electron Device Letters, 2021, doi: 10.1109/LED.2021.3077081. Hua*, C. Wang, J. Chen, J. Zhao, J. Wei, L. Zhang, S. Yang, and Kevin J. Chen, “Gate Current Transport in Enhancement-Mode p-n Junction/AlGaN/GaN (PNJ) HEMT”, IEEE Electron Device Letters, vol. 42, no. 5, pp. 669-672, May 2021, doi: 10.1109/LED.2021.3068296. Hua*, J. Chen, C. Wang, L. Liu, J. Wei, L. Zhang, Z. Zheng, and Kevin J. Chen, “E-mode p-FET-bridge HEMT for Higher VTH and Enhanced Stability”, in 2020 IEEE International Electron Devices Meeting (IEDM), 2020. Chen, M. Hua*, J. Jiang, J. He, J. Wei, and Kevin J. Chen, "Reliability and Stability of Normally-off GaN Power MIS-FETs with LPCVD-SiNxGate Dielectric," in 2020 Int. Symp. On Power Semiconductor Devices and ICs (ISPSD’20), Vienna, Austria, Sep. 3-7, 2020. Wang, M. Hua*, S. Yang, L. Zhang, and Kevin J. Chen, "E-mode pn Junction/AlGaN/GaN HEMTs with Enhanced Gate Reliability," in 2020 Int. Symp. On Power Semiconductor Devices and ICs (ISPSD’20), Vienna, Austria, Sep. 3-7, 2020. Hua*, C. Wang, J. Chen, L. Zhang, Z. Zheng and K. J. Chen, "Gate Reliability and VTHStability Investigations of p-GaN HEMTs," in 2020 IEEE 15th International Conference on Solid-State & Integrated Circuit Technology (ICSICT), Kunming, China, 2020, pp. 1-4, doi: 10.1109/ICSICT49897.2020.9278305. (invited talk) Chen,M. Hua*, J. Wei, J. He, C. Wang, Z. Zheng, and K. J. Chen, " OFF-State Drain-Voltage-Stress-Induced VTH Instability in Schottky-Type p-GaN Gate HEMTs," IEEE Journal of Emerging and Selected Topics in Power Electronics, vol. 9, no. 3, pp. 3686-3694, June 2021, doi: 10.1109/JESTPE.2020.3010408. Wang, M. Hua*, J. Chen, S. Yang, Z. Zheng, J. Wei, L. Zhang, and K. J. Chen, "E-Mode p-n Junction/AlGaN/GaN (PNJ) HEMTs," IEEE Electron Device Letters, vol. 41, no. 4, pp. 545-548, April 2020, , doi: 10.1109/LED.2020.2977143. Hua, J. Wei, Q. Bao, Z. Zhang, Z. Zheng, and K. J. Chen, "Dependence of VTHStability on Gate-Bias under Reverse-Bias Stress in E-mode GaN MIS-FET," IEEE Elec. Dev. Lett., vol. 39, no. 3, pp. 413–416, Jan. 2018. Hua, J. Wei, G. Tang, Z. Zhang, X. Cai, N. Wang, and K. J. Chen, "Normally-off LPCVD-SiNx/GaN MIS-FET with Crystalline Oxidation Interlayer,"IEEE Elec. Dev. Lett., vol. 38, no. 7, pp. 929–932, Jul. 2017. Hua, Y. Lu, S. Liu, C. Liu, K. Fu, Y. Cai, B. Zhang, and K. J. Chen, "Compatibility of AlN/SiNxPassivation With LPCVD-SiNx Gate Dielectric in GaN-Based MIS-HEMT," IEEE Elec. Dev. Lett., vol. 37, No. 3, pp. 265-268, 2016. Hua,X. Cai, S. Yang, Z. Zhang, Z. Zheng, J. Wei, N. Wang, and K. J. Chen, ‘Suppressed Hole-Induced Degradation in E-mode GaN MIS-FETs with Crystalline GaOxN1-x Channel’, in 2018 IEEE International Electron Devices Meeting (IEDM), 2018, pp. 30.3.1-30.3.4. Hua, J. Wei, Q. Bao, Z. Zhang, J. He, Z. Zheng, J. Lei, and K. J. Chen, "Reverse-Bias Stability and Reliability of Hole-Barrier-Free E-mode LPCVD-SiNx/GaN MIS-FETs," 2017 Int. Electron Device Meeting (IEDM 2017), San Francisco, CA, USA, Dec. 2-6, 2017. Hua, Z. Zhang, J. Wei, J. Lei, G. Tang, K. Fu, Y. Cai, B. Zhang, and K. J. Chen, "Integration of LPCVD-SiNxGate Dielectric with Recessed-gate E-mode GaN MIS-FETs: Toward High Performance, High Stability and Long TDDB Lifetime," 2016 Int. Electron Device Meeting (IEDM 2016), San Francisco, CA, USA, Dec. 5-7, 2016.

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