康旺 - 北京航空航天大学 - 集成电路科学与工程学院

个人简介

康旺，博士，副教授，博士生导师；获北京航空航天大学（微电子学）与法国南巴黎大学（物理学）双博士学位；北航校级优秀博士论文（2015）；北航第七批“青年拔尖”人才支持计划（2018）；北京市“科技新星”计划（2020）；IEEE 高级会员，中国电子学会高级会员，ACM & CCF Member 研究成果发表专著Book Chapter 3个。主持国家重点研发计划课题，国家自然科学基金面上，北京市自然科学基金，北京市科技计划，企业横向项目等10余项。发表SCI期刊论文100余篇，包括Nature Electronics, Nature Communications, Proc. IEEE, Nanoscale, IEEE EDL, IEEE TED, IEEE TCAS-I, IEEE TCAS-2, IEEE TC, IEEE TNANO, APL, Physical Reviw Applied, Nanotechnology，ACM JETC等；国际会议论文40余篇，包括 ASSCC, DAC, DATE，ASP-DAC，ICCD，GLSVLSI，ISCAS，MMM, InterMAG等. ESI/IoP 高被引/热点论文9篇；国际会议邀请报告40余个，最佳会议论文2篇，最佳海报1篇，最佳论文候选者2篇；申请发明专利50余项，已授权25项（已成果转化12项）; 论文总被索引 5000 余次 (Google Scholar统计)；获中国电子学会自然科学二等奖（2019）；指导研究生获北航研究生优秀科技创新团队（2020）；指导研究生获清华类脑大赛国际创新大赛一等奖（2017）；指导本科生团队获互联网+创新创业大赛北京市一等奖（2023）；指导本科生/研究生团队获第59届ACM/IEEE DAC电子设计自动化会议全球竞赛FPGA赛道冠军与GPU赛道季军（2023）；指导本科生团队获北航冯如杯科技竞赛信息科技作品一等奖3项（2020，2021，2023一等奖冠军）；指导本科生获北航冯如杯科技竞赛信息科技作品二等奖3项（2022，2023）；指导博士/硕士获国家奖学金4名（2019-2022）；指导博士获博士卓越学术基金（2019-2020）；指导本科生获商汤奖学金（2021）；指导学生获大创华北赛区一等奖，全国总决赛三等奖（2022,2023）；指导北京市级/校级优秀毕业生4名等。

研究领域

人工智能、深度学习、类脑计算等相关的算法、芯片、及系统基于自旋电子的智能存储与计算芯片，以及新型计算体系架构存算融合一体化芯片

近期论文

查看导师最新文章（温馨提示：请注意重名现象，建议点开原文通过作者单位确认）

Partial Sum Quantization for Computing-In-Memory Based Neural Network Accelerator Experimental demonstration of a skyrmion-enhanced strain-mediated physical reservoir computing system All-Digital Computing-in-Memory Macro Supporting FP64-Based Fused Multiply-Add Operation A Reconfigurable Spatial Architecture for Energy-Efficient Inception Neural Networks CIMQ: A Hardware-Efficient Quantization Framework for Computing-In-Memory Based Neural Network Accelerators HD-CIM: Hybrid-Device Computing-In-Memory Structure Based on MRAM and SRAM to Reduce Weight Loading Energy of Neural Networks Experimental Demonstration of STT-MRAM based Nonvolatile Instantly On/Off System for IoT Applications: Case Studies A Mini Tutorial of Processing in Memory: From Principles, Devices to Prototypes SpinCIM: spin orbit torque memory for ternary neural networks based on the computing-in-memory architecture Linear Error Correction Codec Implementation Based on an In-Memory Computing Architecture for Nonvolatile Memories Novel Nonvolatile Lookup Table Design Based on Voltage-Controlled Spin Orbit Torque Memory Foreword Special Issue on Spintronics-Devices and Circuits A Spintronic In-Memory Computing Network for Efficient Hamming Codec Implementation Forecasting the outcome of spintronic experiments with Neural Ordinary Differential Equations Experimental demonstration of skyrmionic magnetic tunnel junction at room temperature Granularity-Driven Management for Reliable and Efficient Skyrmion Racetrack Memories Surface acoustic wave controlled skyrmion-based synapse devices Nonvolatile NULL Convention Logic Pipeline Using Magnetic Tunnel Junctions Spintronic Computing-in-Memory Architecture Based on Voltage-Controlled Spin-Orbit Torque Devices for Binary Neural Networks Magnetic skyrmions for unconventional computing Shift-Limited Sort: Optimizing Sorting Performance on Skyrmion Memory-Based Systems Above Room-Temperature Ferromagnetism in Wafer-Scale Two-Dimensional van der Waals Fe3GeTe2 Tailored by Topological Insulator Guest Editorial: SPIN Special Section on Spintronics for In-Memory Processing Stochastic Computing Implemented by Skyrmionic Logic Devices Thermal Brownian Motion of Skyrmion for True Random Number Generation Skyrmion-based artificial synapses for neuromorphic computing A Comparative Cross-layer Study on Racetrack Memories: Domain Wall vs Skyrmion Magnetic Skyrmion Spectrum Under Voltage Excitation and its Linear Modulation Spintronic Processing Unit within Voltage-Gated Spin Hall Effect MRAMs Skyrmion-Induced Memristive Magnetic Tunnel Junction for Ternary Neural Network Sky-RAM: Skyrmionic Random Access Memory Spintronic Processing Unit in Spin Transfer Torque Magnetic Random Access Memory Voltage-Driven High-Speed Skyrmion Motion in a Skyrmion-Shift Device Low-Power (1T1N) Skyrmionic Synapses for Spiking Neuromorphic Systems An STT-MRAM Based in Memory Architecture for Low Power Integral Computing Modeling and Evaluation of Sub-10-nm Shape Perpendicular Magnetic Anisotropy Magnetic Tunnel Junctions A Full-Sensing-Margin Dual-Reference SensingScheme for Deeply-Scaled STT-RAM Complementary Skyrmion Racetrack Memory Enables Voltage-Controlled Local Data Update Functionality Overview and advances in skyrmionics A Multilevel Cell STT-MRAM-Based Computing In-Memory Accelerator for Binary Convolutional Neural Network Skyrmions in Magnetic Tunnel Junctions Dynamics of a magnetic skyrmionium driven by spin waves Demonstration of Multi-State Memory Device Combining Resistive and Magnetic Switching Behaviors Memristors: Heterogeneous Memristive Devices Enabled by Magnetic Tunnel Junction Nanopillars Surrounded by Resistive Silicon Switches (Adv. Electron. Mater. 3/2018) A compact skyrmionic leaky-integrate-fire spiking neuron device Current-induced magnetization switching in atom-thick tungsten engineered perpendicular magnetic tunnel junctions with large tunnel magnetoresistance Addressing the Thermal Issues of STT-MRAM from Compact Modeling to Design Techniques Voltage-Controlled Magnetic Tunnel Junctions for Processing-In-Memory Implementation Heterogeneous Memristive Devices Enabled by Magnetic Tunnel Junction Nanopillars Surrounded by Resistive Silicon Switches

学术兼职

Microelectronics Journal客座编辑，Spin客座编辑，获邀成为Nature子刊、IEEE、IET与Elsevier等20余个国际期刊及会议的TPC与审稿人，如 DAC, NVMSA, IEEE TED, IEEE TCAS-I, IEEE TCAS-2, IEEE TVLSI, IEEE TCOM, IEEE TCAD, IEEE TNANO, IEEE TNNLS, IEEE JETCAS, ACM JETC等