Fast optical switches have been proposed as a promising alternative to enable continual scaling of data centers with increasing size and data rates. Silicon photonics is a compelling platform for large-scale integrated photonic switches, leveraging advanced manufacturing foundries for electronic integrated circuits. In the past decade, the port counts of silicon photonic switches have increased steadily to $128\times 128$. Further scaling of the switch is constrained by the maximum reticle size (2–3 cm) of lithography tools. Here, we propose to use wafer-scale integration to overcome the die size limit. As a proof of concept demonstration, we fabricated a $240\times 240$ switch by lithographically stitching a $3\times 3$ array of identical $80\times 80$ switch blocks across reticle boundaries. Stitching loss is substantially reduced (0.004 dB) by tapering the waveguide width to 10 μm. The fabricated switch on a $4\mathrm{cm}\times 4\mathrm{cm}$ chip exhibits a maximum on-chip loss of 9.8 dB, an ON/OFF ratio of 70 dB, and switching times of less than 400 ns. To our knowledge, this is the largest integrated photonic switch ever reported. The loss-to-port count ratio (0.04 dB/port) is also the lowest.

中文翻译：

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晶圆级硅光子开关超出芯片尺寸限制

已经提出了快速光开关作为有前途的替代方案，以实现随着规模和数据速率的增加而对数据中心进行连续缩放。硅光子学是利用大规模集成光子开关的引人注目的平台，利用先进的电子集成电路制造铸造厂。在过去的十年中，硅光子开关的端口数一直稳定增长到$128\times 128$。开关的进一步缩放受到光刻工具的最大标线片大小（2-3 cm）的限制。在这里，我们建议使用晶圆级集成来克服管芯尺寸限制。作为概念证明，我们制作了一个$240\times 240$ 通过光刻拼接来切换 $3\times 3$ 相同的数组 $80\times 80$跨掩模版边界切换块。通过将波导宽度逐渐减小至10μm，可以显着减少缝合损耗（0.004 dB）。组装好的开关$4\mathrm{厘米}\times 4\mathrm{厘米}$该芯片的最大片上损耗为9.8 dB，开/关比为70 dB，开关时间小于400 ns。据我们所知，这是有史以来最大的集成光子开关。损耗/端口计数比（0.04 dB /端口）也是最低的。