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Conduction Mechanisms at Interface of AlN/SiN Dielectric Stacks with AlGaN/GaN Heterostructures for Normally-off High Electron Mobility Transistors: Correlating Device Behavior with Nanoscale Interfaces Properties
ACS Applied Materials & Interfaces ( IF 8.3 ) Pub Date : 2017-09-26 00:00:00 , DOI: 10.1021/acsami.7b08935 Giuseppe Greco 1 , Patrick Fiorenza 1 , Ferdinando Iucolano 2 , Andrea Severino 2 , Filippo Giannazzo 1 , Fabrizio Roccaforte 1
ACS Applied Materials & Interfaces ( IF 8.3 ) Pub Date : 2017-09-26 00:00:00 , DOI: 10.1021/acsami.7b08935 Giuseppe Greco 1 , Patrick Fiorenza 1 , Ferdinando Iucolano 2 , Andrea Severino 2 , Filippo Giannazzo 1 , Fabrizio Roccaforte 1
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In this work, the conduction mechanisms at the interface of AlN/SiN dielectric stacks with AlGaN/GaN heterostructures have been studied combining different macroscopic and nanoscale characterizations on bare materials and devices. The AlN/SiN stacks grown on the recessed region of AlGaN/GaN heterostructures have been used as gate dielectric of hybrid metal–insulator–semiconductor high electron mobility transistors (MISHEMTs), showing a normally-off behavior (Vth = +1.2 V), high channel mobility (204 cm2 V–1 s–1), and very good switching behavior (ION/IOFF current ratio of (5–6) × 108 and subthreshold swing of 90 mV/dec). However, the transistors were found to suffer from a positive shift of the threshold voltage during subsequent bias sweeps, which indicates electron trapping in the dielectric stack. To get a complete understanding of the conduction mechanisms and of the charge trapping phenomena in AlN/SiN films, nanoscale current and capacitance measurements by conductive atomic force microscopy (C-AFM) and scanning capacitance microscopy (SCM) have been compared with a macroscopic temperature-dependent characterization of gate current in MIS capacitors. The nanoscale electrical analyses showed the presence of a spatially uniform distribution of electrons trapping states in the insulator and the occurrence of a density of 7 × 108 cm–2 of local and isolated current spots at high bias values. These nanoscale conductive paths can be associated with electrically active defects responsible for the trap-assisted current transport mechanism through the dielectric, observed by the temperature-dependent characterization of the gate current. The results of this study can be relevant for future applications of AlN/SiN bilayers in GaN hybrid MISHEMT technology.
中文翻译：
常关型高电子迁移率晶体管的具有AlGaN / GaN异质结构的AlN / SiN介电堆栈界面处的传导机制：将器件行为与纳米级界面特性相关联
在这项工作中，结合裸露的材料和器件的不同宏观和纳米特征，研究了AlN / SiN介电叠层与AlGaN / GaN异质结构的界面处的传导机理。在AlGaN / GaN异质结构的凹陷区域上生长的AlN / SiN堆叠已用作混合金属-绝缘体-半导体高电子迁移率晶体管（MISHEMT）的栅极电介质，表现出常关行为（V th = +1.2 V） ，高通道迁移率（204 cm 2 V –1 s –1）和非常好的开关性能（I ON / I OFF电流比为（5–6）×10 8和亚阈值摆幅90 mV / dec）。然而，发现晶体管在随后的偏置扫描期间遭受阈值电压的正向偏移，这表明电子在电介质叠层中陷获。为了全面了解AlN / SiN薄膜中的导电机理和电荷俘获现象，已将导电原子力显微镜（C-AFM）和扫描电容显微镜（SCM）进行的纳米级电流和电容测量与宏观温度进行了比较。 MIS电容器中栅极电流的依赖特性。纳米级电分析表明，在绝缘子中存在电子俘获态的空间均匀分布，并且密度为7×10 8 cm –2高偏置值时局部和隔离电流点的变化。这些纳米级导电路径可以与电活性缺陷相关，该电活性缺陷负责通过电介质的陷阱辅助电流传输机制，这是通过栅极电流的温度相关特性来观察的。这项研究的结果可能与AlN / SiN双层在GaN混合MISHEMT技术中的未来应用有关。
更新日期：2017-09-26
中文翻译：
常关型高电子迁移率晶体管的具有AlGaN / GaN异质结构的AlN / SiN介电堆栈界面处的传导机制：将器件行为与纳米级界面特性相关联
在这项工作中，结合裸露的材料和器件的不同宏观和纳米特征，研究了AlN / SiN介电叠层与AlGaN / GaN异质结构的界面处的传导机理。在AlGaN / GaN异质结构的凹陷区域上生长的AlN / SiN堆叠已用作混合金属-绝缘体-半导体高电子迁移率晶体管（MISHEMT）的栅极电介质，表现出常关行为（V th = +1.2 V） ，高通道迁移率（204 cm 2 V –1 s –1）和非常好的开关性能（I ON / I OFF电流比为（5–6）×10 8和亚阈值摆幅90 mV / dec）。然而，发现晶体管在随后的偏置扫描期间遭受阈值电压的正向偏移，这表明电子在电介质叠层中陷获。为了全面了解AlN / SiN薄膜中的导电机理和电荷俘获现象，已将导电原子力显微镜（C-AFM）和扫描电容显微镜（SCM）进行的纳米级电流和电容测量与宏观温度进行了比较。 MIS电容器中栅极电流的依赖特性。纳米级电分析表明，在绝缘子中存在电子俘获态的空间均匀分布，并且密度为7×10 8 cm –2高偏置值时局部和隔离电流点的变化。这些纳米级导电路径可以与电活性缺陷相关，该电活性缺陷负责通过电介质的陷阱辅助电流传输机制，这是通过栅极电流的温度相关特性来观察的。这项研究的结果可能与AlN / SiN双层在GaN混合MISHEMT技术中的未来应用有关。
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