Recently, a capacitive array based on Hf0.5Zr0.5O2 (HZO) has been proposed as an alternative to conventional resistive crossbar arrays for compute‐in‐memory (CIM). This array operates through a capacitive memory window (CMWε). This arises due to interface asymmetry caused by varying defect densities at the top and bottom interfaces. However, the current CMWε is insufficient, necessitating strategies to enhance it. In this study, the impact of stack design on CMWε is examined and it is demonstrated that it is possible to precisely control critical fields in I–V curves to achieve a significantly higher CMWε. A record high CMWε is achieved through an innovative nanolaminate design. The observed characteristics are explained by the Landau‐Ginzburg‐Devonshire (LGD) model and the presence of extra critical fields during I–V sweep. The final device exhibits excellent uniformity and high‐speed operation. Additionally, a substantial memory window for a non‐destructive read operation (NDRO) is confirmed using AC pulses. Alongside detailed electrical characterization, TEM and XRD analyses for an in‐depth investigation is employed to uncover the root cause of the superior characteristics achieved. Ultimately, for analog vector‐matrix multiplication (VMM) in a capacitive array, the carefully designed nanolaminate stack significantly outperforms HZO (0.5) in both output voltage and voltage swing.

中文翻译：

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通过纳米层压板堆栈设计增强 HZO FeCap 的电容式存储器窗口


最近，基于 Hf0.5Zr0.5O2 （HZO） 的电容阵列被提议作为用于内存计算 （CIM） 的传统电阻交叉开关阵列的替代品。该阵列通过电容式存储器窗口 （CMWε） 运行。这是由于顶部和底部界面的缺陷密度不同导致界面不对称而引起的。然而，当前的 CMWε 是不够的，需要策略来增强它。在这项研究中，研究了堆栈设计对 CMWε 的影响，并证明可以精确控制 I-V 曲线中的临界场以实现显着更高的 CMWε。通过创新的纳米层压板设计实现了创纪录的高 CMWε。观察到的特性由 Landau-Ginzburg-Devonshire （LGD） 模型和 I-V 扫描期间存在的额外临界场来解释。最终装置表现出优异的均匀性和高速运行。此外，使用 AC 脉冲确认非破坏性读取操作 （NDRO） 的大量内存窗口。除了详细的电气特性外，还采用 TEM 和 XRD 分析进行深入调查，以揭示实现卓越特性的根本原因。最终，对于电容阵列中的模拟矢量矩阵乘法 （VMM），精心设计的纳米层压板堆栈在输出电压和电压摆幅方面都明显优于 HZO （0.5）。