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Quantum error correction below the surface code threshold
Nature ( IF 50.5 ) Pub Date : 2024-12-09 , DOI: 10.1038/s41586-024-08449-y


Quantum error correction [1, 2, 3, 4] provides a path to reach practical quantum computing by combining multiple physical qubits into a logical qubit, where the logical error rate is suppressed exponentially as more qubits are added. However, this exponential suppression only occurs if the physical error rate is below a critical threshold. Here, we present two below-threshold surface code memories on our newest generation of superconducting processors, Willow: a distance-7 code, and a distance-5 code integrated with a real-time decoder. The logical error rate of our larger quantum memory is suppressed by a factor of \(\varLambda \mathrm{=2.14}\pm 0.02\) when increasing the code distance by two, culminating in a 101-qubit distance-7 code with 0.143% ± 0.003% error per cycle of error correction. This logical memory is also beyond break-even, exceeding its best physical qubit’s lifetime by a factor of \(2.4\pm 0.3\). Our system maintains below-threshold performance when decoding in real time, achieving an average decoder latency of 63 μs at distance-5 up to a million cycles, with a cycle time of 1.1 μs. We also run repetition codes up to distance-29 and find that logical performance is limited by rare correlated error events occurring approximately once every hour, or \(3\)\(\times \)\({10}^{9}\) cycles. Our results present device performance that, if scaled, could realize the operational requirements of large scale fault-tolerant quantum algorithms.



中文翻译:


低于表面代码阈值的量子误差校正



量子纠错 [1, 2, 3, 4] 通过将多个物理量子比特组合成一个逻辑量子比特,提供了一种实现实际量子计算的途径,其中逻辑错误率随着添加更多量子比特而呈指数级抑制。但是,仅当物理错误率低于临界阈值时,才会发生这种指数抑制。在这里,我们展示了我们最新一代超导处理器 Willow 上的两个低于阈值的表面代码存储器:一个距离 7 码和一个与实时解码器集成的距离 5 码。当将代码距离增加 2 时,我们较大的量子内存的逻辑错误率被系数 \(\varLambda \mathrm{=2.14}\pm 0.02\) 抑制,最终得到一个 101 量子比特距离 7 的代码,每个纠错周期的误差为 0.143% ± 0.003%。这个逻辑内存也超出了盈亏平衡,超过了其最佳物理量子比特的寿命 \(2.4\pm 0.3\) 倍。我们的系统在实时解码时保持低于阈值的性能,在 5 距离高达 100 万次循环时实现 63 μs 的平均解码器延迟,周期时间为 1.1 μs。我们还运行了长达 distance-29 的重复代码,发现逻辑性能受到大约每小时发生一次的罕见相关错误事件的限制,或者 \(3\)\(\times \)\({10}^{9}\) 个周期。我们的结果表明,如果扩展,设备性能可以实现大规模容错量子算法的操作要求。

更新日期:2024-12-10
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