Tunnel field-effect transistors (TFETs) are gaining interest for low-power applications, but challenges like poor drive current, delayed saturation, and ambipolarity can hinder their performance. This work proposes a dopingless heterojunction TFET (DL-HTDET) utilizing advanced materials, all based on phosphorus, to address these issues. Our approach involves a comprehensive and accurate analysis of the DL-HTDET's behavior. It employs a hybrid simulation technique integrating atomistic modeling, device simulation, and circuit design. For the first time, we use density functional theory to compute the electrical parameters of a two-dimensional material, 10-layer black phosphorus, configured in the armchair direction as the source region. InP serves as the pocket, while AlP, with its high bandgap, acts as the drain region to suppress ambipolarity. Key parameters, including bandgap, effective mass, mobility, static dielectric constant, and electron affinity, are utilized to simulate the device characteristics. Three mechanisms are considered in the device design: interband tunneling, intraband tunneling, and thermionic emission. The effect of pocket length (L_pocket) on performance is studied, and the impact of different types of interface trap charges, ranging from low to high density, is considered, and the optimized device demonstrates good durability. Additionally, the gate leakage current, which is crucial for static power consumption, is taken into account. The DC and analog/radio frequency performance of the device are evaluated. The optimized DL-HTDET achieves an ON-state current of 125 μA μm⁻¹, a current switching ratio of 10¹⁶, an average subthreshold swing of 5.10 mV dec⁻¹, and a transconductance of 1.47 mS μm⁻¹. A 7T SRAM cell is implemented, demonstrating high noise margins, low delay, and ultra-low power consumption. These achievements underscore the potential of the proposed device for high-speed, ultralow power applications.

中文翻译：

---

磷基异质结隧道场效应晶体管：从原子洞察到电路革新


隧道场效应晶体管 （TFET） 在低功耗应用中越来越受到关注，但驱动电流差、延迟饱和和双极性等挑战可能会阻碍其性能。这项工作提出了一种利用先进材料（全部基于磷）的无掺杂异质结 TFET （DL-HTDET） 来解决这些问题。我们的方法包括对 DL-HTDET 的行为进行全面准确的分析。它采用集成了原子建模、器件仿真和电路设计的混合仿真技术。我们首次使用密度泛函理论来计算二维材料的电参数，即 10 层黑磷，在扶手椅方向配置为源区域。InP 充当口袋，而具有高带隙的 AlP 充当漏极区以抑制双极性。关键参数（包括带隙、有效质量、迁移率、静态介电常数和电子亲和力）用于模拟器件特性。器件设计考虑了三种机制：带间隧穿、带内隧穿和热离子发射。研究了口袋长度 （L_pocket） 对性能的影响，并考虑了从低密度到高密度的不同类型的界面陷阱电荷的影响，优化后的器件表现出良好的耐用性。此外，还考虑了对静态功耗至关重要的栅极漏电流。评估设备的直流和模拟/射频性能。优化的 DL-HTDET 实现了 125 μA ^μm-1 的导通状态电流，电流开关比为 10：¹⁶，平均亚阈值摆幅为 5。10 mV ^dec-1，跨导为 1.47 mS ^μm-1。该器件采用 7T SRAM 单元，具有高噪声容限、低延迟和超低功耗等特性。这些成就凸显了所提出的器件在高速、超低功耗应用方面的潜力。