A central building block of many quantum algorithms is the diagonalization of Pauli operators. Although it is always possible to construct a quantum circuit that simultaneously diagonalizes a given set of commuting Pauli operators, only resource-efficient circuits can be executed reliably on near-term quantum computers. Generic diagonalization circuits, in contrast, often lead to an unaffordable SWAP gate overhead on quantum devices with limited hardware connectivity. A common alternative is to exclude two-qubit gates altogether. However, this comes at the severe cost of restricting the class of diagonalizable sets of Pauli operators to tensor product bases (TPBs). In this article, we introduce a theoretical framework for constructing hardware-tailored (HT) diagonalization circuits. Our framework establishes a systematic and highly flexible procedure for tailoring diagonalization circuits with ultra-low gate counts. We highlight promising use cases of our framework and – as a proof-of-principle application – we devise an efficient algorithm for grouping the Pauli operators of a given Hamiltonian into jointly-HT-diagonalizable sets. For several classes of Hamiltonians, we observe that our approach requires fewer measurements than conventional TPB approaches. Finally, we experimentally demonstrate that HT circuits can improve the efficiency of estimating expectation values with cloud-based quantum computers.

许多量子算法的核心构建块是 Pauli 运算符的对角化。尽管总是可以构建一个量子电路，同时对一组给定的通勤 Pauli 运算符进行对角化，但只有资源高效的电路才能在近期量子计算机上可靠地执行。相比之下，通用对角化电路通常会导致硬件连接受限的量子设备上无法承受的 SWAP 门开销。一种常见的替代方法是完全排除双量子比特门。然而，这是以将可对角化的 Pauli 算子集类别限制为张量积基 （TPB） 的严重代价为代价的。在本文中，我们介绍了构建硬件定制 （HT） 对角化电路的理论框架。我们的框架建立了一个系统且高度灵活的程序，用于定制具有超低门数的对角化电路。我们重点介绍了框架的有前途的用例，并且作为原理验证应用程序，我们设计了一种有效的算法，用于将给定哈密顿量的 Pauli 运算符分组为联合 HT 对角化集合。对于几类哈密顿量，我们观察到我们的方法比传统的 TPB 方法需要更少的测量。最后，我们实验证明 HT 电路可以提高使用基于云的量子计算机估计期望值的效率。