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Grating‐Based Eight‐Channel Lan‐WDM Silicon Photonic Transceiver for Tb/s Applications
Laser & Photonics Reviews ( IF 9.8 ) Pub Date : 2024-11-07 , DOI: 10.1002/lpor.202401249
Zanyun Zhang, Meixin Li, Xiaoqing Lv, Kaixin Zhang, Lingjun Zhou, Hao Jiang, Ke Li, Tianjun Liu, Qixin Wang, Beiju Huang

An eight‐channel local‐area‐network wavelength division multiplexing silicon photonic transceiver is designed within a 5 mm × 5 mm chip area. This integrated chip is composed of a set of perfectly vertical grating couplers, interleaved angled‐MMI wavelength division (de)multiplexers, silicon E‐O modulators, and germanium waveguide photodetectors. The multiplexer exhibits an IL of (4.5–5.8) dB and average crosstalk ≈−20 dB. Due to the limited bandwidth of the 2‐D GC, the IL of the demultiplexer is 5.17 dB at minimum, with a channel nonuniformity of 5.53 dB. The EO modulator and germanium waveguide PD exhibit 3‐dB bandwidths of 45 and 47 GHz, respectively. With a customized fiber array packaged, a back‐to‐back data transmission capacity of 1.56 and 1.42 Tb/s with BERs below the SD‐FEC limit is demonstrated for the transmitter and receiver, respectively. By connecting the transmitter and receiver, the dynamic performance of the transceiver chip is characterized, and the total data capacity of eight wavelength channels is 1.18 Tb/s. To show the advantage of transmission distance, 2 and 10 km SMF transmission experiments are also carried out. Through close integration with matched electronic circuits, the data capacity of this transceiver chip can be potentially boomed to 1.6 Tb/s.

中文翻译:


基于光栅的 8 通道 Lan-WDM 硅光子收发器,用于 Tb/s 应用



在 5 mm × 5 mm 芯片区域内设计了一个八通道局域网波分复用硅光子收发器。该集成芯片由一组完全垂直的光栅耦合器、交错式斜角 MMI 波分(解)复用器、硅 E-O 调制器和锗波导光电探测器组成。多路复用器的 IL 为 (4.5–5.8) dB,平均串扰≈−20 dB。由于 2-D GC 的带宽有限,解复用器的 IL 最小为 5.17 dB,通道不均匀性为 5.53 dB。EO 调制器和锗波导 PD 分别具有 45 GHz 和 47 GHz 的 3dB 带宽。通过定制的光纤阵列封装,发射器和接收器的背靠背数据传输容量分别为 1.56 和 1.42 Tb/s,BER 低于 SD-FEC 限制。通过连接发射器和接收器,表征了收发器芯片的动态性能,八个波长通道的总数据容量为 1.18 Tb/s。为了展示传输距离的优势,还进行了 2 公里和 10 公里的 SMF 传输实验。通过与匹配的电子电路紧密集成,该收发器芯片的数据容量有可能提高到 1.6 Tb/s。
更新日期:2024-11-07
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