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A 7-bit 1.75-GS/s 6.9-fJ/conv.-step FoM$_{\mathrm{w}}$ Loop-Unrolled Fully Asynchronous SAR ADC in 3-nm CMOS for a 224-Gb/s SerDes Receiver
IEEE Journal of Solid-State Circuits ( IF 4.6 ) Pub Date : 2024-10-21 , DOI: 10.1109/jssc.2024.3449115 Chakravarti Bheemisetti, Karunanidhan Pandey, Idan Lotan, Gadi Ori, Ahmad Khairi, Yoel Krupnik, Udi Virobnik, Boyapati Subrahmanyam, Ariel Cohen, Nagendra Krishnapura
更新日期：2024-10-21
IEEE Journal of Solid-State Circuits ( IF 4.6 ) Pub Date : 2024-10-21 , DOI: 10.1109/jssc.2024.3449115 Chakravarti Bheemisetti, Karunanidhan Pandey, Idan Lotan, Gadi Ori, Ahmad Khairi, Yoel Krupnik, Udi Virobnik, Boyapati Subrahmanyam, Ariel Cohen, Nagendra Krishnapura
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