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When in-memory computing meets spiking neural networks—A perspective on device-circuit-system-and-algorithm co-design
Applied Physics Reviews ( IF 11.9 ) Pub Date : 2024-09-23 , DOI: 10.1063/5.0211040
Abhishek Moitra, Abhiroop Bhattacharjee, Yuhang Li, Youngeun Kim, Priyadarshini Panda

This review explores the intersection of bio-plausible artificial intelligence in the form of spiking neural networks (SNNs) with the analog in-memory computing (IMC) domain, highlighting their collective potential for low-power edge computing environments. Through detailed investigation at the device, circuit, and system levels, we highlight the pivotal synergies between SNNs and IMC architectures. Additionally, we emphasize the critical need for comprehensive system-level analyses, considering the inter-dependencies among algorithms, devices, circuit, and system parameters, crucial for optimal performance. An in-depth analysis leads to the identification of key system-level bottlenecks arising from device limitations, which can be addressed using SNN-specific algorithm–hardware co-design techniques. This review underscores the imperative for holistic device to system design-space co-exploration, highlighting the critical aspects of hardware and algorithm research endeavors for low-power neuromorphic solutions.

中文翻译:


当内存计算遇到尖峰神经网络时——设备-电路-系统-和算法协同设计的视角



这篇综述探讨了尖峰神经网络 (SNN) 形式的生物合理人工智能与模拟内存计算 (IMC) 领域的交叉点,强调了它们在低功耗边缘计算环境中的集体潜力。通过对器件、电路和系统级别的详细研究,我们强调了 SNN 和 IMC 架构之间的关键协同作用。此外,我们强调综合系统级分析的迫切需要,考虑到算法、设备、电路和系统参数之间的相互依赖性,这对于最佳性能至关重要。深入分析可识别因设备限制而产生的关键系统级瓶颈,这些瓶颈可以使用 SNN 特定算法-硬件协同设计技术来解决。这篇评论强调了整体设备到系统设计空间共同探索的必要性,强调了低功耗神经拟态解决方案的硬件和算法研究工作的关键方面。
更新日期:2024-09-23
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