Nature ( IF 50.5 ) Pub Date : 2024-09-18 , DOI: 10.1038/s41586-024-07941-9 J Van Damme 1, 2 , S Massar 1 , R Acharya 1 , Ts Ivanov 1 , D Perez Lozano 1 , Y Canvel 1 , M Demarets 1, 2 , D Vangoidsenhoven 1 , Y Hermans 1 , J G Lai 1 , A M Vadiraj 1 , M Mongillo 1 , D Wan 1 , J De Boeck 1, 2 , A Potočnik 1 , K De Greve 1, 2
The development of superconducting qubit technology has shown great potential for the construction of practical quantum computers1,2. As the complexity of quantum processors continues to grow, the need for stringent fabrication tolerances becomes increasingly critical3. Utilizing advanced industrial fabrication processes could facilitate the necessary level of fabrication control to support the continued scaling of quantum processors. However, at present, these industrial processes are not optimized to produce high-coherence devices, nor are they a priori compatible with the approaches commonly used to make superconducting qubits. Here we demonstrate superconducting transmon qubits manufactured in a 300 mm complementary metal–oxide–semiconductor (CMOS) pilot line using industrial fabrication methods, with resulting relaxation and coherence times exceeding 100 μs. We show across-wafer, large-scale statistics of coherence, yield, variability and ageing that confirm the validity of our approach. The presented industry-scale fabrication process, which uses only optical lithography and reactive-ion etching, has a performance and yield in line with conventional laboratory-style techniques utilizing metal lift-off, angled evaporation and electron-beam writing4. Moreover, it offers the potential for further upscaling through three-dimensional integration5 and more process optimization. This result marks the advent of an alternative and new, large-scale, truly CMOS-compatible fabrication method for superconducting quantum computing processors.
中文翻译:
在 300 mm 晶圆上进行超导量子比特的先进 CMOS 制造
超导量子比特技术的发展在构建实用量子计算机方面显示出巨大的潜力1,2。随着量子处理器的复杂性不断增加,对严格的制造公差的需求变得越来越重要3。利用先进的工业制造工艺可以促进必要的制造控制水平,以支持量子处理器的持续扩展。然而,目前,这些工业过程并未经过优化以生产高相干器件,也与制造超导量子比特的常用方法先验兼容。在这里,我们展示了使用工业制造方法在 300 mm 互补金属氧化物半导体 (CMOS) 试验线中制造的超导 transmon 量子比特,产生的弛豫和相干时间超过 100 μs。我们展示了跨晶圆的相干性、良率、可变性和老化的大规模统计数据,证实了我们方法的有效性。所提出的工业规模制造工艺仅使用光学光刻和反应离子蚀刻,其性能和产量与利用金属剥离、倾斜蒸发和电子束写入的传统实验室式技术一致4。此外,它还提供了通过 3D 集成5 和更多流程优化进一步扩大规模的潜力。这一结果标志着一种用于超导量子计算处理器的替代性、大规模、真正兼容 CMOS 的制造方法的出现。