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Reduced Overshoots, Oscillations and dV/dt Generation in Parallel Connected SiC MOSFET Modules with Optional Active Current Balancing
IEEE Transactions on Power Electronics ( IF 6.6 ) Pub Date : 2024-09-03 , DOI: 10.1109/tpel.2024.3453438 Mason Parker 1 , Sebastian Neira 1 , Edward L. Horsley 2 , Stephen Finney 1 , Paul D. Judge 1
中文翻译：
具有可选有源电流平衡功能的并联 SiC MOSFET 模块可减少过冲、振荡和 dV/dt 生成
更新日期：2024-09-03
IEEE Transactions on Power Electronics ( IF 6.6 ) Pub Date : 2024-09-03 , DOI: 10.1109/tpel.2024.3453438 Mason Parker 1 , Sebastian Neira 1 , Edward L. Horsley 2 , Stephen Finney 1 , Paul D. Judge 1
Affiliation
中文翻译：
具有可选有源电流平衡功能的并联 SiC MOSFET 模块可减少过冲、振荡和 dV/dt 生成
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