V-defects are morphological defects that typically form on threading dislocations during epitaxial growth of (0001)-oriented GaN layers. A V-defect is a hexagonal pyramid-shaped depression with six {101¯1}-oriented sidewalls. These semipolar sidewalls have a lower polarization barrier than the polarization barriers present between the polar c-plane quantum wells and quantum barriers and can laterally inject carriers directly into quantum wells in GaN-based light emitting diodes (LEDs). This is especially important, as the high polarization field in c-plane GaN is a significant factor in the high forward voltage of GaN LEDs. The optimal V-defect density for efficient lateral carrier injection in a GaN LED (∼109 cm−2) is typically an order of magnitude higher than the threading dislocation density of GaN grown on patterned sapphire substrates (∼108 cm−2). Pure-edge dislocation loops have been known to exist in GaN, and their formation into large V-defects via low-temperature growth with high Si-doping has recently been studied. Here, we develop a method for pure-edge threading dislocation half-loop formation and density control via disilane flow, growth temperature, and thickness of the half-loop generation layer. We also develop a method of forming the threading dislocation half-loops into V-defects of comparable size to those originating from substrate threading dislocations.

中文翻译：

---

位错半环控制可实现 GaN 基发光二极管的最佳 V 缺陷密度


V 缺陷是一种形态缺陷，通常在 (0001) 取向 GaN 层的外延生长过程中在穿透位错上形成。 V 形缺陷是具有六个 {101´1} 取向侧壁的六角锥状凹陷。这些半极性侧壁的偏振势垒比极性 c 面量子阱和量子势垒之间存在的偏振势垒低，并且可以将载流子直接横向注入到 GaN 基发光二极管 (LED) 的量子阱中。这一点尤其重要，因为 c 面 GaN 中的高极化场是 GaN LED 高正向电压的重要因素。 GaN LED (∼109 cm−2) 中有效横向载流子注入的最佳 V 缺陷密度通常比在图案化蓝宝石衬底 (∼108 cm−2) 上生长的 GaN 的穿透位错密度高一个数量级。已知 GaN 中存在纯刃位错环，并且最近研究了它们通过高硅掺杂的低温生长形成大 V 型缺陷。在这里，我们开发了一种通过乙硅烷流量、生长温度和半环生成层厚度控制纯边缘螺纹位错半环形成和密度控制的方法。我们还开发了一种将螺纹位错半环形成为与源自基底螺纹位错的尺寸相当的V型缺陷的方法。