Silicon spin qubits are promising candidates for scalable quantum computers, due to their coherence and compatibility with CMOS technology. Advanced industrial processes ensure wafer-scale uniformity and high device yield, but traditional transistor processes cannot be directly transferred to qubit structures. To leverage the micro-electronics industry expertise, we customize a 300 mm wafer fabrication line for silicon MOS qubit integration. With careful optimization of the gate stack, we report uniform quantum dot operation at the Si/SiO₂ interface at mK temperature. We measure a record-low average noise with a value of 0.61 \({\rm{\mu }}{\rm{eVH}}{{\rm{z}}}^{-0.5}\) at 1 Hz and even below 0.1 \({\rm{\mu }}{\rm{eVH}}{{\rm{z}}}^{-0.5}\) for some operating conditions. Statistical analysis of the charge noise measurements show that the noise source can be described by a two-level fluctuator model. This reproducible low noise level, in combination with uniform operation of our quantum dots, marks CMOS manufactured spin qubits as a mature platform towards scalable high-fidelity qubits.

由于硅自旋量子位与 CMOS 技术的一致性和兼容性，它们是可扩展量子计算机的有希望的候选者。先进的工业工艺确保了晶圆级的均匀性和高器件良率，但传统的晶体管工艺无法直接转移到量子位结构。为了利用微电子行业的专业知识，我们定制了一条 300 mm 晶圆制造线，用于硅 MOS 量子位集成。通过对栅极堆叠的仔细优化，我们报告了在 mK 温度下 Si/SiO ₂ 界面上均匀的量子点操作。我们在 1 Hz 时测量了创纪录的低平均噪声，值为 0.61 \({\rm{\mu }}{\rm{eVH}}{{\rm{z}}}^{-0.5}\)对于某些操作条件，甚至低于 0.1 \({\rm{\mu }}{\rm{eVH}}{{\rm{z}}}^{-0.5}\)。电荷噪声测量的统计分析表明，噪声源可以用两级波动器模型来描述。这种可重复的低噪声水平与我们量子点的统一操作相结合，标志着 CMOS 制造的自旋量子位成为可扩展的高保真量子位的成熟平台。