The monolithic three-dimensional vertical integration of thin-film transistor (TFT) technologies could be used to create high-density, energy-efficient and low-cost integrated circuits. However, the development of scalable processes for integrating three-dimensional TFT devices is challenging. Here, we report the monolithic three-dimensional integration of indium oxide (In₂O₃) TFTs on a silicon/silicon dioxide (Si/SiO₂) substrate at room temperature. We use an approach that is compatible with complementary metal–oxide–semiconductor (CMOS) processes to stack ten n-channel In₂O₃ TFTs. Different architectures—including bottom-, top- and dual-gate TFTs—can be fabricated at different layers in the stack. Our dual-gate devices exhibit enhanced electrical performance with a maximum field-effect mobility of 15 cm² V⁻¹ s⁻¹, a subthreshold swing of 0.4 V dec⁻¹ and a current on/off ratio of 10⁸. By monolithically integrating dual-gate In₂O₃ TFTs at different locations in the stack, we created unipolar invertor circuits with a signal gain of around 50 and wide noise margins. The dual-gate devices also allow fine-tuning of the invertors to achieve symmetric voltage-transfer characteristics and optimal noise margins.

单片三维垂直集成薄膜晶体管（TFT）技术可用于创建高密度、节能和低成本的集成电路。然而，开发用于集成三维 TFT 器件的可扩展工艺具有挑战性。在这里，我们报告了室温下在硅/二氧化硅（Si/SiO ₂ ）基板上的氧化铟（In ₂ O ₃ ）TFT的单片三维集成。我们使用与互补金属氧化物半导体 (CMOS) 工艺兼容的方法来堆叠 10 个 n 沟道 In ₂ O ₃ TFT。不同的架构（包括底部、顶部和双栅极 TFT）可以在堆叠的不同层上制造。我们的双栅极器件表现出增强的电气性能，最大场效应迁移率为15 cm ² V ^-1 s ^-1 ，亚阈值摆幅为0.4 V dec ^-1 ，电流开/关比为10 ⁸ 。通过在堆栈中的不同位置单片集成双栅极 In ₂ O ₃ TFT，我们创建了信号增益约为 50 且噪声容限较宽的单极逆变器电路。双栅极器件还允许对逆变器进行微调，以实现对称的电压传输特性和最佳的噪声容限。