Parity compilation is the challenge of laying out the required constraints for the parity mapping in a local way. We present the first constructive compilation algorithm for the parity architecture using plaquettes for arbitrary higher-order optimization problems. This enables adiabatic protocols, where the plaquette layout can natively be implemented, as well as fully parallelized digital circuits. The algorithm builds a rectangular layout of plaquettes, where in each layer of the rectangle at least one constraint is added. The core idea is that each constraint, consisting of any qubits on the boundary of the rectangle and some new qubits, can be decomposed into plaquettes with a deterministic procedure using ancillas. We show how to pick a valid set of constraints and how this decomposition works. We further give ways to optimize the ancilla count and show how to implement optimization problems with additional constraints.

中文翻译：

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奇偶校验架构的建设性牌匾汇编


奇偶校验编译是以本地方式设置奇偶校验映射所需约束的挑战。我们提出了第一个针对奇偶校验架构的构造性编译算法，该算法使用板片来解决任意高阶优化问题。这使得绝热协议成为可能，其中可以本地实现小板布局以及完全并行的数字电路。该算法构建了牌匾的矩形布局，其中在矩形的每一层中添加至少一个约束。核心思想是，每个约束（由矩形边界上的任何量子位和一些新量子位组成）都可以使用辅助程序通过确定性过程分解为小块。我们展示了如何选择一组有效的约束以及这种分解是如何工作的。我们进一步给出了优化辅助计数的方法，并展示了如何在附加约束下实现优化问题。