The primary challenge facing silicon-based electronics, crucial for modern technological progress, is difficulty in dimensional scaling. This stems from a severe deterioration of transistor performance due to carrier scattering when silicon thickness is reduced below a few nanometres. Atomically thin two-dimensional (2D) semiconductors still maintain their electrical characteristics even at sub-nanometre scales and offer the potential for monolithic three-dimensional (3D) integration. Here we explore a strategic shift aimed at addressing the scaling bottleneck of silicon by adopting 2D semiconductors as new channel materials. Examining both academic and industrial viewpoints, we delve into the latest trends in channel materials, the integration of metal contacts and gate dielectrics, and offer insights into the emerging landscape of industrializing 2D semiconductor-based transistors for monolithic 3D integration.

对于现代技术进步至关重要的硅基电子产品面临的主要挑战是尺寸缩放的困难。这是由于当硅厚度减小到几纳米以下时，由于载流子散射而导致晶体管性能严重恶化。原子薄的二维 (2D) 半导体即使在亚纳米尺度下仍能保持其电气特性，并为单片三维 (3D) 集成提供了潜力。在这里，我们探索了一项战略转变，旨在通过采用二维半导体作为新的沟道材料来解决硅的缩放瓶颈。我们审视学术和工业观点，深入研究沟道材料、金属接触和栅极电介质集成的最新趋势，并深入了解用于单片 3D 集成的基于 2D 半导体的晶体管工业化的新兴前景。