This article presents a low-power (LP), compact, wideband (WB) low-noise transconductance amplifier (LNTA)-first receiver (RX) designed for software-defined radios (SDRs). It comprises the LNTA, frequency divider, mixer, and trans-impedance amplifier (TIA). The LNTA utilizes a common gate (CG)-common source (CS) structure without on-chip inductors and incorporates gm-boosting and current reuse techniques to effectively reduce power consumption. A novel noise-canceling (NC) strategy is proposed to break the inherent tradeoff between input impedance matching, noise figure (NF), and gain. The divider adopts a windmill structure based on NAND gates, while 25% duty-cycle quadrature clocks drive the double-balanced passive mixer. The third-order filtering TIA is based on a three-stage pseudo-differential operational transconductance amplifier (OTA). It implements $RC$ and feedforward (FF) compensation techniques to attain a 3.25-GHz unity gain loop bandwidth (BW) and 68-dB loop gain. Fabricated in a 40-nm LP CMOS technology, the chip features 38-dB conversion gain, 50-MHz baseband (BB) BW, 3.5-dB NF, and in-band (IB) output third-order intercept point of up to 40 dBm. The RX operates over a frequency range of 0.1–5.5 GHz. It consumes 36 mW of static power in the RX signal path and 15 mW of dynamic power in the local oscillator (LO) path at 5 GHz. The core area is only 0.1 mm2.

中文翻译：

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低功耗、紧凑型、0.1–5.5GHz、40dBm IB OIP3 LNTA 首款 SDR 接收器


本文介绍了一款专为软件定义无线电 (SDR) 设计的低功耗 (LP)、紧凑型宽带 (WB) 低噪声跨导放大器 (LNTA) 接收器 (RX)。它包括 LNTA、分频器、混频器和跨阻放大器 (TIA)。 LNTA采用共栅（CG）-共源（CS）结构，无片上电感，并结合gm升压和电流复用技术，有效降低功耗。提出了一种新颖的噪声消除 (NC) 策略，以打破输入阻抗匹配、噪声系数 (NF) 和增益之间的固有权衡。分频器采用基于与非门的风车结构，同时25%占空比正交时钟驱动双平衡无源混频器。三阶滤波 TIA 基于三级伪差分运算跨导放大器 (OTA)。它实现了$RC$和前馈 (FF) 补偿技术，以获得 3.25GHz 单位增益环路带宽 (BW) 和 68dB 环路增益。该芯片采用 40 nm LP CMOS 技术制造，具有 38dB 转换增益、50MHz 基带 (BB) 带宽、3.5dB NF 和高达 40 的带内 (IB) 输出三阶截取点。分贝。 RX 的工作频率范围为 0.1–5.5 GHz。在 5 GHz 时，它在 RX 信号路径中消耗 36 mW 的静态功率，在本地振荡器 (LO) 路径中消耗 15 mW 的动态功率。核心面积仅为0.1平方毫米。