This article presents a coherent ultra-wideband (UWB) receiver architecture based on a quadrature hybrid correlation (QHC) method that significantly reduces the digital-correlation-relevant power in the conventional standard-compliant UWB receiver. The proposed QHC receiver front end employs analog correlation, two-step synchronization with a digital-assisted path, and time-interleaved (TI) sampling methods for low-power synchronization and demodulation. A code-mismatch-evaluation method is adopted to achieve the time-of-arrival (ToA) function. In addition, a ternary analog correlator is designed for noise mitigation and high-quality computing. A prototype UWB receiver covering an 8-GHz channel is implemented in 65-nm CMOS. The receiver supports preamble, scrambled timestamp sequence (STS), and burst position modulation (BPM) with a symbol rate of 0.98/7.8 Mbaud/s. With a duty-cycled operation, the receiver consumes 17.3 mW at 0.98 Mbaud/s with a sensitivity of −88 dBm at a bit-error rate (BER) of 10−3 during payload. The blocker tolerance is −24 dBm. In the STS field, the receiver achieves an rms ranging error of 1.9 cm.

中文翻译：

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采用 65 nm CMOS 的 IEEE 802.15.4/4z 相干正交混合相关 UWB 接收器


本文提出了一种基于正交混合相关 (QHC) 方法的相干超宽带 (UWB) 接收器架构，可显着降低传统标准兼容 UWB 接收器中与数字相关相关的功率。所提出的 QHC 接收器前端采用模拟相关、数字辅助路径的两步同步以及时间交织 (TI) 采样方法来实现低功耗同步和解调。采用代码不匹配评估方法来实现到达时间（ToA）功能。此外，三态模拟相关器专为降低噪声和高质量计算而设计。覆盖 8 GHz 通道的原型 UWB 接收器采用 65 nm CMOS 实现。接收器支持前导码、加扰时间戳序列 (STS) 和突发位置调制 (BPM)，符号率为 0.98/7.8 Mbaud/s。通过占空比操作，接收器在有效负载期间以 0.98 Mbaud/s 的速率消耗 17.3 mW，灵敏度为 -88 dBm，误码率 (BER) 为 10−3。阻塞容限为−24 dBm。在STS领域，接收机实现了1.9厘米的均方根测距误差。