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NEST: A Quadruple-Node Upset Recovery Latch Design and Algorithm-Based Recovery Optimization
IEEE Transactions on Aerospace and Electronic Systems ( IF 5.1 ) Pub Date : 2024-03-21 , DOI: 10.1109/taes.2024.3379962 Zhengfeng Huang 1 , Liting Sun 1 , Xu Wang 1 , Huaguo Liang 1 , Yingchun Lu 1 , Aibin Yan 1 , Jun Pan 1 , Xiaoqing Wen 2
IEEE Transactions on Aerospace and Electronic Systems ( IF 5.1 ) Pub Date : 2024-03-21 , DOI: 10.1109/taes.2024.3379962 Zhengfeng Huang 1 , Liting Sun 1 , Xu Wang 1 , Huaguo Liang 1 , Yingchun Lu 1 , Aibin Yan 1 , Jun Pan 1 , Xiaoqing Wen 2
Affiliation
Multinode upset induced by radiation on integrated circuits has caused many circuit reliability issues. This article proposes a single-event quadruple-node upset (QNU) recovery latch (NEST), based on four circular feedback loops that are formed by 25 C-elements to realize high robustness. NEST achieves 29.02% reduction in power consumption compared to the latch design and algorithm-based verification protected against multiple-node upset (LDAVPM) latch and 51.44% reduction in setup time compared to the quadruple-node upset recoverable and high-impedance-state insensitive latch (QRHIL) latch. NEST also achieves a 99.29% QNU recovery rate. Furthermore, a high-speed, high-precision optimization algorithm for multinode upset recovery is also proposed and implemented. This algorithm achieves 99.84 reduction in simulation time for exhaustive fault injections having equivalent accuracy with high performance simulation program with integrated circuit emphasis (HSPICE).
中文翻译:
NEST:四节点翻转恢复锁存器设计和基于算法的恢复优化
集成电路上的辐射引起的多节点扰乱已引起许多电路可靠性问题。本文提出了一种单事件四节点翻转(QNU)恢复锁存器(NEST),基于由 25 个 C 元件形成的四个循环反馈回路,以实现高鲁棒性。与锁存器设计和针对多节点翻转 (LDAVPM) 锁存器的基于算法的验证相比,NEST 的功耗降低了 29.02%,与四节点翻转可恢复和高阻抗状态不敏感相比,设置时间缩短了 51.44%锁存器(QRHIL)锁存器。 NEST 还实现了 99.29% 的 QNU 回收率。此外,还提出并实现了一种高速、高精度的多节点翻转恢复优化算法。该算法将详尽故障注入的仿真时间缩短了 99.84 倍,其精度与具有集成电路重点的高性能仿真程序 (HSPICE) 相当。
更新日期:2024-03-21
中文翻译:
NEST:四节点翻转恢复锁存器设计和基于算法的恢复优化
集成电路上的辐射引起的多节点扰乱已引起许多电路可靠性问题。本文提出了一种单事件四节点翻转(QNU)恢复锁存器(NEST),基于由 25 个 C 元件形成的四个循环反馈回路,以实现高鲁棒性。与锁存器设计和针对多节点翻转 (LDAVPM) 锁存器的基于算法的验证相比,NEST 的功耗降低了 29.02%,与四节点翻转可恢复和高阻抗状态不敏感相比,设置时间缩短了 51.44%锁存器(QRHIL)锁存器。 NEST 还实现了 99.29% 的 QNU 回收率。此外,还提出并实现了一种高速、高精度的多节点翻转恢复优化算法。该算法将详尽故障注入的仿真时间缩短了 99.84 倍,其精度与具有集成电路重点的高性能仿真程序 (HSPICE) 相当。