Addressing the advancement toward large-scale quantum computers, this article presents the first four-level pulse amplitude modulation (PAM4) wireline transmitter (TX) operating at cryogenic temperatures (CTs). With quantum computers scaling up toward thousands of quantum bits (qubits), but having too limited fidelity for robust operation, continuous rounds of quantum error correction (QEC) are necessary. However, QEC requires a large amount of data to be transferred from a cryogenic controller at 4K to a classical processor at room temperature (RT). To bridge the gap, a high-speed data link between the quantum processor at CT and the classical counterpart at RT is needed. The proposed PAM4 TX architecture integrates a low-power 64:4 serializer structure, a high-speed 4:1 current-mode logic (CML) multiplexer, and a linear 6-bit digital-to-analog converter (DAC). Considering the challenges and benefits of CMOS operating at CTs, the TX architecture and circuitry are designed to exploit the maximum speed, while maintaining sufficient linearity. The fabricated 40-nm CMOS chip achieves a data rate of 40-Gb/s (36-Gb/s), an energy efficiency of 2.46 pJ/b (2.47 pJ/b), and 97.8% (96.6%) ratio of level mismatch (RLM) at CT (RT). While demonstrating an energy efficiency comparable to prior-art TXs in more advanced CMOS nodes at RT, the broad operating temperature of the proposed TX enables the required high-speed wireline link for large-scale quantum computers.

中文翻译：

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用于量子计算的基于 Cryo-CMOS DAC 的 40-Gb/s PAM4 有线发射器


针对大规模量子计算机的发展，本文介绍了首款在低温 (CT) 下运行的四级脉冲幅度调制 (PAM4) 有线发射器 (TX)。随着量子计算机扩展到数千个量子位（qubit），但保真度太有限，无法实现稳健运行，因此需要连续几轮的量子纠错（QEC）。然而，QEC 需要将大量数据从 4K 的低温控制器传输到室温 (RT) 的经典处理器。为了弥补这一差距，CT 的量子处理器和 RT 的经典对应处理器之间需要建立高速数据链路。所提出的 PAM4 TX 架构集成了低功耗 64:4 串行器结构、高速 4:1 电流模式逻辑 (CML) 多路复用器和线性 6 位数模转换器 (DAC)。考虑到在 CT 上运行 CMOS 的挑战和优势，TX 架构和电路的设计旨在利用最大速度，同时保持足够的线性度。所制造的 40 nm CMOS 芯片实现了 40 Gb/s (36 Gb/s) 的数据速率、2.46 pJ/b (2.47 pJ/b) 的能效以及 97.8% (96.6%) 的电平比CT (RT) 处的失配 (RLM)。虽然在 RT 下展示了与更先进的 CMOS 节点中的现有技术 TX 相当的能源效率，但所提出的 TX 的广泛工作温度能够实现大规模量子计算机所需的高速有线链路。