This article presents a 40.68-MHz single-stage dual-output regulating (SSDOR) rectifier, which has a new rectifier topology with only three active diodes for producing two outputs. Zero-voltage switching (ZVS) turn-on control for each active diode is developed to minimize converter power loss when rectifying 40.68-MHz input ac voltage. Synchronous PFM control is also proposed to regulate both outputs and provides fast load transient responses. Implemented in a 65-nm CMOS process with 2.5-V I/O devices, the proposed SSDOR rectifier is verified to provide two regulated output voltages of 2.2 and 1.1 V, and deliver a maximum output power of 60.5 mW. With a three-active-diode rectifier architecture and ZVS turn-on control, the proposed SSDOR rectifier achieves a peak power efficiency of 90.1%. The output cross-regulation is unnoticeable under load step changes. Compared with the prior art, the proposed dual-output regulating rectifier is the first to support ac input with the highest resonance frequency of 40.68 MHz that results in the reduction of the receiver (RX) coil size by at least four times.

中文翻译：

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具有 ZVS 和同步 PFM 控制的高效 40.68MHz 单级双输出稳压整流器，用于无线供电


本文介绍了一种 40.68 MHz 单级双输出调节 (SSDOR) 整流器，该整流器采用新的整流器拓扑，仅使用三个有源二极管来产生两个输出。每个有源二极管的零电压开关 (ZVS) 导通控制旨在最大限度地减少整流 40.68 MHz 输入交流电压时的转换器功率损耗。还提出了同步 PFM 控制来调节两个输出并提供快速负载瞬态响应。所提出的 SSDOR 整流器采用 65 nm CMOS 工艺和 2.5-VI/O 器件实施，经验证可提供 2.2 和 1.1 V 两个稳压输出电压，并提供 60.5 mW 的最大输出功率。借助三有源二极管整流器架构和 ZVS 导通控制，所提出的 SSDOR 整流器实现了 90.1% 的峰值功率效率。在负载阶跃变化下，输出交叉调节不明显。与现有技术相比，所提出的双输出调节整流器是第一个支持最高谐振频率为40.68 MHz的交流输入的双输出调节整流器，这导致接收器（RX）线圈尺寸减小至少四倍。