Excitons in monolayer semiconductors, benefitting from their large binding energies, hold great potential towards excitonic circuits bridging nano-electronics and photonics. However, achieving room-temperature ultrafast on-chip electrical modulation of excitonic distribution and flow in monolayer semiconductors is nontrivial. Here, utilizing lateral bias, we report high-speed electrical modulation of the excitonic distribution in a monolayer semiconductor junction at room temperature. The alternating charge trapping/detrapping at the two monolayer/electrode interfaces induces a non-uniform carrier distribution, leading to controlled in-plane spatial variations of excitonic populations, and mimicking a bias-driven excitonic flow. This modulation increases with the bias amplitude and eventually saturates, relating to the energetic distribution of trap density of states. The switching time of the modulation is down to 5 ns, enabling high-speed excitonic devices. Our findings reveal the trap-assisted exciton engineering in monolayer semiconductors and offer great opportunities for future two-dimensional excitonic devices and circuits.

单层半导体中的激子得益于其巨大的结合能，在连接纳米电子学和光子学的激子电路方面具有巨大的潜力。然而，在单层半导体中实现激子分布和流动的室温超快片上电调制并非易事。在这里，我们利用横向偏压，报告了室温下单层半导体结中激子分布的高速电调制。两个单层/电极界面处的交替电荷捕获/去捕获引起不均匀的载流子分布，导致激子群体的受控面内空间变化，并模拟偏置驱动的激子流。这种调制随着偏置幅度的增加而增加，并最终饱和，这与陷阱态密度的能量分布有关。调制的开关时间低至 5 ns，可实现高速激子器件。我们的研究结果揭示了单层半导体中的陷阱辅助激子工程，并为未来的二维激子器件和电路提供了巨大的机会。