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Monolithic 3D integration of back-end compatible 2D material FET on Si FinFET
npj 2D Materials and Applications ( IF 9.1 ) Pub Date : 2023-02-07 , DOI: 10.1038/s41699-023-00371-7
Shi-Xian Guan , Tilo H. Yang , Chih-Hao Yang , Chuan-Jie Hong , Bor-Wei Liang , Kristan Bryan Simbulan , Jyun-Hong Chen , Chun-Jung Su , Kai-Shin Li , Yuan-Liang Zhong , Lain-Jong Li , Yann-Wen Lan

The performance enhancement of integrated circuits relying on dimension scaling (i.e., following Moore’s Law) is more and more challenging owing to the physical limit of Si materials. Monolithic three-dimensional (M3D) integration has been considered as a powerful scheme to further boost up the system performance. Two-dimensional (2D) materials such as MoS2 are potential building blocks for constructing upper-tier transistors owing to their high mobility, atomic thickness, and back-end-of-line (BEOL) compatible processes. The concept to integrate 2D material-based devices with Si field-effect transistor (FET) is technologically important but the compatibility is yet to be experimentally demonstrated. Here, we successfully integrated an n-type monolayer MoS2 FET on a p-type Si fin-shaped FET with 20 nm fin width via an M3D integration technique to form a complementary inverter. The integration was enabled by deliberately adopting industrially matured techniques, such as chemical mechanical planarization and e-beam evaporation, to ensure its compatibility with the existing 3D integrated circuit process and the semiconductor industry in general. The 2D FET is fabricated using low-temperature sequential processes to avoid the degradation of lower-tier Si devices. The MoS2 n-FETs and Si p-FinFETs display symmetrical transfer characteristics and the resulting 3D complementary metal-oxide-semiconductor inverter show a voltage transfer characteristic with a maximum gain of ~38. This work clearly proves the integration compatibility of 2D materials with Si-based devices, encouraging the further development of monolithic 3D integrated circuits.



中文翻译:

后端兼容 2D 材料 FET 在 Si FinFET 上的单片 3D 集成

由于Si材料的物理限制,依靠尺寸缩放(即遵循摩尔定律)的集成电路的性能提升越来越具有挑战性。单片三维 (M3D) 集成被认为是进一步提升系统性能的强大方案。二维 (2D) 材料,如 MoS 2,由于其高迁移率、原子厚度和后道工序 (BEOL) 兼容工艺,是构建上层晶体管的潜在构建块。将基于二维材料的器件与 Si 场效应晶体管 (FET) 集成的概念在技术上很重要,但兼容性尚未通过实验证明。在这里,我们成功地集成了一个 n 型单层 MoS 2FET 在具有 20 nm 鳍宽的 p 型硅鳍形 FET 上通过 M3D 集成技术形成互补反相器。集成是通过有意采用工业上成熟的技术实现的,例如化学机械平面化和电子束蒸发,以确保其与现有 3D 集成电路工艺和整个半导体行业的兼容性。2D FET 使用低温顺序工艺制造,以避免下层 Si 器件的退化。硫化钼n-FET 和 Si p-FinFET 显示出对称传输特性,由此产生的 3D 互补金属氧化物半导体反相器显示出最大增益约为 38 的电压传输特性。这项工作清楚地证明了二维材料与硅基器件的集成兼容性,推动了单片 3D 集成电路的进一步发展。

更新日期:2023-02-07
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