This letter presents a fully integrated frequency doubler in the TSMC 28-nm CMOS technology. MOS transistor capacitor neutralization is introduced in the differential driving amplifier, which shows better robustness than MOM capacitor neutralization under PVT variations. Besides, a stacked transformer-based balun is designed to achieve good balance performance. The effect of dummy metal on the performance of the proposed balun is also discussed. The measured results show that the 3-dB bandwidth is 25 GHz (208–233 GHz) and the peak power-added efficiency is 1.1% with a dc power consumption of 26.4 mW at 222 GHz. The peak conversion gain is −7.2 dB and the variation in conversion gain is less than 1 dB within −7- to 1-dBm input power range. Moreover, the chip size is $492\times 412\,\,\mu \text{m}^{2}$ , including GSG and DC pads.

中文翻译：

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在 28-nm CMOS 中具有 1.1% 功率附加效率的 208–233-GHz 倍频器

这封信介绍了采用 TSMC 28-nm CMOS 技术的完全集成倍频器。在差分驱动放大器中引入了MOS晶体管电容中和，在PVT变化下表现出比MOM电容中和更好的鲁棒性。此外，基于堆叠变压器的巴伦旨在实现良好的平衡性能。还讨论了虚拟金属对所提出的巴伦性能的影响。测量结果表明，3-dB 带宽为 25 GHz（208-233 GHz），峰值功率附加效率为 1.1%，222 GHz 时的直流功耗为 26.4 mW。峰值转换增益为 -7.2 dB，转换增益的变化在 -7 至 1-dBm 输入功率范围内小于 1 dB。此外，芯片尺寸为 $492\times 412\,\,\mu \text{m}^{2}$ ，包括 GSG 和 DC 焊盘。