A 2-mA charge-balanced neurostimulator in 0.18-μm/1.8 V standard CMOS process,International Journal of Circuit Theory and Applications

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A 2-mA charge-balanced neurostimulator in 0.18-μm/1.8 V standard CMOS process
International Journal of Circuit Theory and Applications ( IF 1.8 ) Pub Date : 2022-10-31 , DOI: 10.1002/cta.3478
Mahdi Hosseinnejad ₁ , Mostafa Katebi ₁ , Abbas Erfanian ₁ , Mohammad Azim Karami ₁

Affiliation

This paper presents a programmable neurostimulator 4 × V_DD with 7.2 V operating voltage in a 0.18-μm/1.8 V CMOS process. The output voltage compliance exceeds 6.2 V. A current gain control is designed to adjust bias current. A 5-bit current mode digital-to-analog converter (DAC) is used to set delivered current in current driver. A high output impedance current mirror is designed to guarantee charge balancing. The charge mismatch after biphasic stimulation is about 0.14%. Moreover, current mirrors are turned off after stimulation to decrease power consumption. The headroom voltage is about 1 V for all the voltage drivers and the current mirrors. The proposed neurostimulator occupies 0.95 × 0.95 mm² with a maximum current range of 0–2000 μA and a power consumption less than 60 μW.

中文翻译：

采用 0.18 μm/1.8 V 标准 CMOS 工艺的 2 mA 电荷平衡神经刺激器

本文介绍了一种可编程神经刺激器 4 × V _DD，工作电压为 7.2 V，采用 0.18-μm/1.8 V CMOS 工艺。输出电压合规性超过 6.2 V。电流增益控制旨在调节偏置电流。5 位电流模式数模转换器 (DAC) 用于设置电流驱动器中的输送电流。高输出阻抗电流镜旨在保证电荷平衡。双相刺激后的电荷失配约为 0.14%。此外，电流镜在刺激后关闭以降低功耗。所有电压驱动器和电流镜的净空电压约为 1 V。拟议的神经刺激器占地 0.95 × 0.95 mm ²，最大电流范围为 0–2000 μA，功耗小于 60 μW。

更新日期：2022-10-31

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