The Fermi-Dirac distribution of carriers and the drift-diffusion mode of transport represent two fundamental barriers towards the reduction of the subthreshold slope (SS) and the optimization of the energy consumption of field-effect transistors. In this study, we report the realization of steep-slope impact ionization field-effect transistors (I²FETs) based on a gate-controlled homogeneous WSe₂ lateral junction. The devices showed average SS down to 2.73 mV/dec over three decades of source-drain current and an on/off ratio of ~10⁶ at room temperature and low bias voltages (<1 V). We determined that the lucky-drift mechanism of carriers is valid in WSe₂, allowing our I²FETs to have high impact ionization coefficients and low SS at room temperature. Moreover, we fabricated a logic inverter based on a WSe₂ I²FET and a MoS₂ FET, exhibiting an inverter gain of 73 and almost ideal noise margin for high- and low-logic states. Our results provide a promising approach for developing functional devices as front runners for energy-efficient electronic device technology.

载流子的费米-狄拉克分布和漂移扩散传输模式代表了降低亚阈值斜率 (SS) 和优化场效应晶体管能耗的两个基本障碍。在这项研究中，我们报告了基于栅极控制的均质 WSe ₂横向结的陡坡碰撞电离场效应晶体管 (I ^{2 FET) 的实现。}这些器件在三个十年的源极-漏极电流和低偏置电压 (<1 V) 下的开/关比约为 10 ⁶时，平均 SS 低至 2.73 mV/dec 。我们确定载流子的幸运漂移机制在 WSe ₂中是有效的，允许我们的 I ²FET 在室温下具有高碰撞电离系数和低 SS。此外，我们制造了一个基于 WSe ₂ I ² FET 和 MoS ₂ FET 的逻辑反相器，其反相器增益为 73，对于高逻辑状态和低逻辑状态的噪声容限几乎是理想的。我们的研究结果为开发功能性设备作为节能电子设备技术的领跑者提供了一种有前途的方法。