This letter presents a low noise amplifier (LNA) with a 3-dB gain bandwidth (3-dB BW) of 18–44 GHz in 65-nm CMOS technology. By deriving an analytical equation of input impedance, a co-design methodology for the first two stages of LNA that can simultaneously achieve broadband input matching and low noise figure (NF) is implemented. Weakly coupled asymmetric transformers that introduce a section of reverse parallel winding in the primary coil are designed to realize broadband interstage matching, optimize the gain flatness and boost the transconductance. The proposed LNA achieves a measured peak gain of 19.5 dB with a fractional 3-dB gain bandwidth (FBW) of 83.8%, covering the whole $K$ -band and $Ka$ -band. The measured NF is 2.6–3.5 dB from 20 to 43 GHz. To the best of our knowledge, the proposed LNA achieves the highest 3-dB BW and FBW with competitive NF. The measured input 1-dB gain compression point ( $\text {IP}_{\mathrm {1\,dB}}$ ) ranges from −23 to −18.5 dBm over the entire 3-dB gain bandwidth.

中文翻译：

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具有输入匹配和带宽扩展技术的 18–44 GHz 低噪声放大器

这封信介绍了采用 65-nm CMOS 技术的低噪声放大器 (LNA)，其 3-dB 增益带宽 (3-dB BW) 为 18–44 GHz。通过推导输入阻抗的解析方程，实现了可同时实现宽带输入匹配和低噪声系数 (NF) 的 LNA 前两级的协同设计方法。弱耦合非对称变压器在初级线圈中引入一段反向并联绕组，旨在实现宽带级间匹配，优化增益平坦度并提高跨导。所提出的 LNA 实现了 19.5 dB 的测量峰值增益，分数 3-dB 增益带宽 (FBW) 为 83.8%，覆盖了整个 $K$ -乐队和 $卡$ -乐队。从 20 到 43 GHz 测得的 NF 为 2.6–3.5 dB。据我们所知，所提出的 LNA 实现了最高的 3-dB BW 和 FBW，并具有具有竞争力的 NF。测得的输入 1dB 增益压缩点（ $\text {IP}_{\mathrm {1\,dB}}$ ) 在整个 3-dB 增益带宽内的范围为 -23 至 -18.5 dBm。