Atomic Layer MoTe2 Field-Effect Transistors and Monolithic Logic Circuits Configured by Scanning Laser Annealing,ACS Nano

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Atomic Layer MoTe2 Field-Effect Transistors and Monolithic Logic Circuits Configured by Scanning Laser Annealing
ACS Nano ( IF 15.8 ) Pub Date : 2021-12-16 , DOI: 10.1021/acsnano.1c07169
Xia Liu ₁ , Arnob Islam ₁ , Ning Yang ₂ , Bradley Odhner ₃ , Mary Anne Tupta ₃ , Jing Guo ₂ , Philip X-L Feng _{1,

2}

Affiliation

Atomically thin semiconductors such as transition metal dichalcogenides have recently enabled diverse devices in the emerging two-dimensional (2D) electronics. While scalable 2D electronics demand monolithic integrated circuits consisting of complementary p-type and n-type transistors, conventional p-type and n-type doping in desired regions, monolithically in the same semiconducting atomic layers, remains elusive or impractical. Here, we report on an agile, high-precision scanning laser annealing approach to realizing 2D monolithic complementary logic circuits on atomically thin MoTe₂, by reliably designating p-type and n-type transport polarity in the constituent transistors via localized laser annealing and modification of their Schottky contacts. Pristine p-type field-effect transistors (FETs) transform into n-type ones upon controlled laser annealing on their source/drain gold electrodes, exhibiting a mobility of 96.5 cm² V^–1 s^–1 (the highest known to date) and an On/Off ratio of 10⁶. Elucidation and validation of such an on-demand configuration of polarity in MoTe₂ FETs further enable the construction and demonstration of essential logic circuits, including both inverter and NOR gates. This dopant-free, spatially precise scanning laser annealing approach to configuring monolithic complementary logic integrated circuits may enable programmable functions in 2D semiconductors, exhibiting potential for additively manufactured, scalable 2D electronics.

中文翻译：

通过扫描激光退火配置的原子层 MoTe2 场效应晶体管和单片逻辑电路

诸如过渡金属二硫属化物之类的原子级薄半导体最近使新兴的二维 (2D) 电子设备中的各种设备成为可能。虽然可扩展的 2D 电子产品需要由互补 p 型和 n 型晶体管组成的单片集成电路，但在所需区域中的常规 p 型和 n 型掺杂，单片在相同的半导体原子层中，仍然难以捉摸或不切实际。在这里，我们敏捷，高精度扫描激光退火的方法报告给上原子级薄的微尘实现2D单片互补逻辑电路₂，通过在构成晶体管可靠地指定的p型和n型传输极性通过局部激光退火和肖特基接触的修改。原始 p 型场效应晶体管 (FET) 在其源极/漏极金电极上进行受控激光退火后转变为 n 型，表现出 96.5 cm ² V ^–1 s ^–1（迄今为止已知的最高）的迁移率和10 ⁶的开/关比。阐明和验证 MoTe ₂中这种按需极性配置FET 进一步支持基本逻辑电路的构建和演示，包括反相器和或非门。这种用于配置单片互补逻辑集成电路的无掺杂、空间精确的扫描激光退火方法可以实现 2D 半导体中的可编程功能，显示出增材制造、可扩展的 2D 电子产品的潜力。

更新日期：2021-12-28

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