共面顶栅配置中的准自对准有机薄膜晶体管,ACS Applied Electronic Materials

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共面顶栅配置中的准自对准有机薄膜晶体管
ACS Applied Electronic Materials ( IF 4.3 ) Pub Date : 2021-10-27 , DOI: 10.1021/acsaelm.1c00872
Jörn Vahland ₁ , Karl Leo ₁ , Hans Kleemann ₁

Affiliation

除了电荷载流子迁移率和接触电阻外，寄生重叠电容是限制有机薄膜晶体管动态行为的关键因素。减少源/漏和栅电极之间寄生重叠电容的最有效方法是采用自对准晶体管架构。然而，到目前为止，有机晶体管的自对准只能使用不可扩展或复杂的制造工艺来实现。在这里，我们展示了采用可靠且可扩展的最先进制造技术（例如湿化学蚀刻）制造的共面顶栅架构中的准自对准 OTFT。自对准是通过在通道界面顶部执行湿化学蚀刻工艺来实现的。我们证明，为了正确选择蚀刻剂，通道界面的电荷载流子传输特性不会劣化。自对准设计的好处在于减少了 2 个数量级 (0.13 nF cm^–2 ) 低于非自对准器件 (15 nF cm ^–2 )。此外，我们强调了这种方法在有机晶体管高频操作方面的潜力，并量化了与非自对准器件相比截止频率的增益。

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Quasi-Self-Aligned Organic Thin-Film Transistors in Coplanar Top-Gate Configuration

Besides charge carrier mobility and contact resistance, parasitic overlap capacitance is a key factor limiting the dynamic behavior of organic thin-film transistors. The most effective away to reduce parasitic overlap capacitances between source/drain and gate electrode is to employ self-aligned transistor architectures. However, so far, self-alignment in organic transistors has only been achieved using nonscalable or complex fabrication processes. Here we demonstrate quasi-self-aligned OTFTs in a coplanar top-gate architecture fabricated with reliable and scalable state-of-the-art fabrication techniques such as wet-chemical etching. Self-alignment is achieved by carrying out a wet-chemical etching process on top of the channel interface. We prove that for the proper choice of etchant, the charge carrier transport properties of the channel interface are not deteriorated. The benefit of the self-aligned design lies in the reduction of the specific overlap capacitances which are 2 orders of magnitude (0.13 nF cm^–2) lower than for nonself-aligned devices (15 nF cm^–2). Furthermore, we highlight the potential of this approach for high-frequency operation of organic transistors and quantify the gain in cutoff frequency compared to non-self-aligned devices.

更新日期：2021-11-23

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