All 2D Heterostructure Tunnel Field-Effect Transistors: Impact of Band Alignment and Heterointerface Quality,ACS Applied Materials & Interfaces

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All 2D Heterostructure Tunnel Field-Effect Transistors: Impact of Band Alignment and Heterointerface Quality
ACS Applied Materials & Interfaces ( IF 8.3 ) Pub Date : 2020-11-04 , DOI: 10.1021/acsami.0c13233
Keigo Nakamura ₁ , Naoka Nagamura _{2,

3} , Keiji Ueno ₄ , Takashi Taniguchi ₂ , Kenji Watanabe ₂ , Kosuke Nagashio ₁

Affiliation

Van der Waals heterostructures are the ideal material platform for tunnel field-effect transistors (TFETs) because a band-to-band tunneling (BTBT) dominant current is feasible at room temperature (RT) because of ideal, dangling bond-free heterointerfaces. However, achieving subthreshold swing (SS) values lower than 60 mV dec^–1 of the Boltzmann limit is still challenging. In this work, we systematically studied the band alignment and heterointerface quality in n-MoS₂ channel heterostructure TFETs. By selecting a p⁺-MoS₂ source with a sufficiently high doping level, stable gate modulation to a type III band alignment was achieved regardless of the number of MoS₂ channel layers. For the gate stack formation, it was found that the deposition of Al₂O₃ as the top gate introduces defect states for the generation current under reverse bias, while the integration of a hexagonal boron nitride (h-BN) top gate provides a defect-free, clean interface, resulting in the BTBT dominant current even at RT. All 2D heterostructure TFETs produced by combining the type III n-MoS₂/p⁺-MoS₂ heterostructure with the h-BN top-gate insulator resulted in low SS values at RT.

中文翻译：

所有2D异质结构隧道场效应晶体管：能带对准和异质界面质量的影响

Van der Waals异质结构是隧道场效应晶体管（TFET）的理想材料平台，因为在室温（RT）情况下，由于理想的，悬空的无键异质界面，带对隧穿（BTBT）主电流是可行的。但是，实现低于Boltzmann限值的60 mV dec ^–1的亚阈值摆幅（SS）值仍然具有挑战性。在这项工作中，我们系统地研究了n-MoS ₂沟道异质结构TFET中的能带对准和异质界面质量。通过选择具有足够高掺杂水平的ap ⁺ -MoS ₂源，无论MoS ₂的数量如何，均可实现对III型能带对准的稳定栅极调制。通道层。对于栅极叠层的形成，发现作为顶部栅极的Al ₂ O ₃的沉积在反向偏压下引入了产生电流的缺陷状态，而六方氮化硼（h-BN）顶部栅极的集成则提供了缺陷-干净的界面，即使在RT时也能产生BTBT主导电流。通过将III型n-MoS ₂ / p ⁺ -MoS ₂异质结构与h-BN顶栅绝缘体结合而产生的所有2D异质结构TFET均会导致RT下的SS值较低。

更新日期：2020-11-18

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