Low‐Temperature Polysilicon Oxide Thin‐Film Transistors with Coplanar Structure Using Six Photomask Steps Demonstrating High Inverter Gain of 264 V V−1,Advanced Engineering Materials

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Low‐Temperature Polysilicon Oxide Thin‐Film Transistors with Coplanar Structure Using Six Photomask Steps Demonstrating High Inverter Gain of 264 V V−1
Advanced Engineering Materials ( IF 3.4 ) Pub Date : 2020-02-13 , DOI: 10.1002/adem.201901497
Duk Young Jeong ₁ , Yeoungjin Chang _{1,

2} , Won Gyeong Yoon ₁ , Youngbin Do ₁ , Jin Jang ₁

Affiliation

The low‐temperature polysilicon oxide (LTPO) complementary metal‐oxide‐semiconductor (CMOS) thin‐film transistors (TFTs) is fabricated by p‐type low‐temperature polysilicon (LTPS) TFT and n‐type amorphous indium‐gallium‐zinc oxide (a‐IGZO) TFT using coplanar structure. A double‐stack SiO₂ layer deposited by high temperature first and then low‐temperature process is used as a gate insulator for LTPS TFT, leading to reduce the number of photomask steps. The p‐channel LTPS TFT of the fabricated LTPO circuits exhibits the field‐effect mobility (μ_FE) and threshold voltage (V_TH) of 89.9 cm² (V s)⁻¹ and −5.5 V, respectively. However, the a‐IGZO TFT exhibits the μ_FE of 22.5 cm² (V s)⁻¹ and V_TH of −1.3 V. Both the LTPS TFT and a‐IGZO TFT show excellent bias stability (ΔV_TH of <0.1 V) and zero hysteresis voltage, which reveals the excellent interface between gate insulator and semiconductor. The LTPO CMOS inverter exhibits a gain of 264.5 V V⁻¹ and a high noise margin of 4.29 V, and a low noise margin of 3.69 V at V_DD of 8 V. Therefore, the LTPO TFT technology developed in this work can be a promising candidate for low cost, large‐area manufacturing of display, and TFT electronics.

中文翻译：

共平面结构的低温多晶硅薄膜晶体管，采用六个光掩模步骤，可实现264 V V-1的高反相器增益

低温多晶硅（LTPO）互补金属氧化物半导体（CMOS）薄膜晶体管（TFT）由p型低温多晶硅（LTPS）TFT和n型非晶铟镓锌氧化物制成（a-IGZO）使用共面结构的TFT。首先通过高温然后低温工艺沉积的双层SiO ₂层用作LTPS TFT的栅极绝缘体，从而减少了光掩模步骤。p沟道低温多晶硅薄膜晶体管的制造的LTPO电路表现出的场效应迁移率（μ _FE）和阈值电压（V _TH 89.9厘米）² （V ^S）-1分别和-5.5伏。但是，a‐IGZO TFT的μ_FE为22.5 cm ² （V s）^-1，V _TH为-1.3V。LTPS TFT和a-IGZO TFT均显示出出色的偏置稳定性（ΔV _TH <0.1 V）和零滞后电压，这显示了出色的栅极绝缘体和半导体之间的界面。LTPO CMOS反相器的增益为264.5 V V ^-1，高噪声裕度为4.29 V，在V _DD为8 V时具有3.69 V的低噪声裕度。因此，这项工作中开发的LTPO TFT技术可能是有前途的低成本，大面积显示器制造和TFT电子产品的候选人。

更新日期：2020-02-13

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