李晓维 - 中国科学院大学 - 计算机科学与技术学院

个人简介

招生专业 081201-计算机系统结构招生方向 VLSI测试, 容错计算可靠设计, 硬件安全教育背景 1988-09--1991-07 中国科学院计算技术研究所博士学历北京大学计算机系 1991/09~1993/07 博士后（合作导师：杨芙清院士）中国科学院计算所CAD开放实验室 1988/09~1991/07 博士生（导师：魏道政研究员）合肥工业大学计算机系 1985/09~1988/07 硕士生（导师：杨作慎教授）合肥工业大学计算机系 1981/09~1985/07 本科生学位 1991/07 工学博士学位计算机专业中科院计算所 1988/07 工学硕士学位计算机专业合肥工业大学计算机与信息系 1985/07 工学学士学位计算机专业合肥工业大学电子工程系出国学习工作 1997/01-1999/01 Department of Electrical & Electronic Engineering, The University of Hong Kong 1999/07-2000/02 School of Information Science, Nara Institute of Science and Technology, Japan 工作简历 2011-11~现在, 计算机体系结构国家重点实验室, 常务副主任 2000-09~现在, 中国科学院计算技术研究所, 研究员 1999-07~2000-02,日本奈良先端科学技术大学院, 访问研究员 1997-01~1999-01,香港大学电气电子工程学系, 访问研究员 1993-08~2000-08,北京大学计算机系, 副教授 1991-09~1993-07,北京大学计算机系, 博士后教授课程 VLSI测试与可测试性设计科学前沿进展名家系列讲座IV VLSI测试与可测性设计数字系统的故障诊断与可靠设计 VLSI测试与可测性分析数字系统的故障诊断与容错设计奖励信息（1）微处理器全生命周期可靠设计关键技术及应用, 二等奖, 部委级, 2018 （2）高性能处理器测试验证与片上容错技术及应用, 二等奖, 省级, 2017 （3）面向集成电路质量技术创新人才培养需求的教育教学改革实践, 二等奖, 院级, 2016 （4）数字集成电路故障片上检测技术研究与应用, 二等奖, 部委级, 2016 （5） 32位星载容错控制计算机系统关键技术及应用, 二等奖, 国家级, 2015 （6）星载微处理器系统验证-测试-恢复技术及应用, 二等奖, 国家级, 2012 （7）高性能处理芯片的测试和可靠性设计关键技术, 一等奖, 部委级, 2011 （8）面向计算机系统结构领域高级人才培养的课程体系建设, 一等奖, 部委级, 2008 （9）数字电路测试若干关键技术及其在微处理器测试中的应用, 二等奖, 其他, 2008 （10）龙芯CPU研究集体, 部委级, 2003 （11）测试方法研究及应用, 二等奖, 部委级, 1992 科研项目（ 1 ）大规模高通量计算系统的可靠性设计, 主持, 国家级, 2011-01--2015-08 （ 2 ）基于硅通孔的三维集成电路故障诊断基于硅通孔的三维集成电路故障诊断, 主持, 国家级, 2015-01--2017-12 （ 3 ）集成电路安全隐患检测的理论与方法, 主持, 国家级, 2016-01--2020-12 （ 4 ）存算一体计算架构和模拟器, 主持, 国家级, 2019-09--2024-08

研究领域

集成电路测试, EDA, 容错计算, 硬件安全

近期论文

查看导师最新文章（温馨提示：请注意重名现象，建议点开原文通过作者单位确认）

[1] Y. Fang, H. Li, Xiaowei Li, “Lifetime Enhancement Techniques for PCM-Based Image Buffer in Multimedia Applications”, IEEE Transactions on VLSI Systems, Vol.22, No.5, May 2014, pp.1450-1455 [2] J. Ye, Y. Hu, Xiaowei Li, Wu-Tung Cheng, Yu Huang, and Huaxing Tang, “Diagnose Failures Caused by Multiple Locations At-a-Time”, IEEE Transactions on VLSI Systems, Vol.22, No.4, April 2014, pp.824-837 [3] K. Huang, Y. Hu, Xiaowei Li, “A Reliability-Oriented Placement and Routing Algorithm for SRAM-based FPGAs”, IEEE Transactions on VLSI Systems, Vol.22, No.2, Feb 2014, pp.256-269 [4] B. Fu, Y. Han, H. Li, Xiaowei Li, “ZoneDefense: A Fault-Tolerant Routing for 2D Meshes Without Virtual Channels”, IEEE Transactions on VLSI Systems, Vol.22, No.1, Jan 2014, pp.113-126 [5] Y. Zhang, H. Li, Xiaowei Li, “Automatic Test Program Generation Using Executing Trace Based Constraint Extraction for Embedded Processors”, IEEE Transactions on VLSI Systems, Vol.21, No.7, July 2013, pp.1220-1233 [6] Z. He, T. Lv, H. Li, Xiaowei Li, “Test Path Selection for Capturing Delay Failures under Statistical Timing Model”, IEEE Transactions on VLSI Systems, Vol.21, No.7, July 2013, pp.1210-1219 [7] S. Jin, Y. Han, H. Li, Xiaowei Li, “Unified Capture Scheme for Small Delay Defect Detection and Aging Prediction”, IEEE Transactions on VLSI Systems, Vol.21, No.5, May 2013, pp.821-833 [8] Y. Chen, L. Zhang, Y. Han, Xiaowei Li, “Thermal-Constrained Scheduling for Interconnect Energy Reduction in 3D Homogeneous MPSoCs”, IEEE Transactions on VLSI Systems, Vol.21, No.2, Feb. 2013, pp.239-249 [9] S. Pei, H. Li, Xiaowei Li, “Flip-flop Selection for Partial Enhanced Scan to Reduce Transition Test Pattern Volume”, IEEE Transactions on VLSI Systems, Vol.20, No.12, Dec. 2012, pp.2157-2169 [10] S. Pei, H. Li, Xiaowei Li, “A High-Precision On-Chip Path Delay Measurement Architecture”, IEEE Transactions on VLSI Systems, Vol.20, No.09, Sept 2012, pp.1565-1577 [11] S. Pan, Y. Hu, Xiaowei Li, “IVF: Characterizing the Vulnerability of Microprocessor Structures to Intermittent Faults”, IEEE Transactions on VLSI Systems, Vol.20, No.05, May 2012, pp.777-790 [12] X. Fu, H. Li, Xiaowei Li, “Testable Path Selection and Grouping for Faster Than At-Speed Testing”, IEEE Transactions on VLSI Systems, Vol.20, No.02, February 2012, pp.236-247 [13] M. Zhang, H. Li, Xiaowei Li, “Path Delay Test Generation Toward Activation of Worst Case Coupling Effects”, IEEE Transactions on VLSI Systems, Vol.19, No.11, November 2011, pp.1969-1982 [14] Y. Zhang, H. Li, Y. Min, Xiaowei Li, “Selected Transition Time Adjustment for Tolerating Crosstalk Effects on Network-on-Chip Interconnects”, IEEE Transactions on VLSI Systems, Vol.19, No.10, October 2011, pp.1787-1800 [15] G. Yan, Y. Han, Xiaowei Li, “SVFD: A Versatile Online Fault Detection Scheme via Checking of Stability Violation”, IEEE Transactions on VLSI Systems, Vol.19, No.9, September 2011, pp.1627-1640 [16] G. Yan, Y. Han, Xiaowei Li, “ReviveNet: A Self-adaptive Architecture for Improving Lifetime Reliability via Localized Timing Adaptation”, IEEE Transactions on Computers, Volume 60, Issue 9, September 2011, pp.1219-1232 [17] D. Fan, Xiaowei Li, G. Li, “New Methodologies for Parallel Architecture”, Journal of Computer Science and Technology, 26(4): 578-584, July 2011 [18] G. Yan, Y. Han, H. Liu, X. Liang, Xiaowei Li, “Microfix: Using timing interpolation and delay sensors for power reduction”, ACM Transactions on Design Automation of Electronic Systems, March 2011, Vol. 16, No. 2, Article 16:1-21 [19] Z. An, H. Zhu, C. Xu, Y. Xu, Xiaowei Li, “Synchronization of Linear Pulse-coupled Oscillators with Different Frequency”, IEEE Transactions on Industry Electronics, Vol.58, No.6, June 2011, pp. 2205-2215 [20] Y. Yang, Y. Xu, Xiaowei Li, “A Loss Inference Algorithm for Wireless Sensor Networks to Improve Data Reliability of Digital Ecosystems”, IEEE Transactions on Industry Electronics, Vol.58, No.6, June 2011, pp. 2126-2137 [21] J. Li, Q. Xu, Y. Hu, Xiaowei Li, “X-Filling for Simultaneous Shift- and Capture- Power Reduction in At-Speed Scan-Based Testing”, IEEE Transactions on VLSI Systems, Vol.18, No.7, July. 2010, pp.1081-1092 [22] L. Zhang, Y. Han, Q. Xu, Xiaowei Li, H. Li, “On Topology Reconfiguration for Defect-Tolerant NoC-Based Homogeneous Manycore Systems”, IEEE Transactions on VLSI Systems, Vol.17, No.9, Sept. 2009, pp.1173-1186 [23] Y. Han, Y. Hu, Xiaowei Li, A. Chandra, Huawei Li, “Embedded Test Decompressor to Reduce the Required Channels and Vector Memory of Tester for System-on-a-Chip”, IEEE Transactions on VLSI Systems, Vol.15, No.5, May 2007, pp.531-540

学术兼职

2020-01-11-2024-01-11,中国计算机学会, 监事长 2020-01-01-今,IEEE Transactions on Circuits and Systems II: Express Briefs, Associate Editor 2018-10-01-今,中国电子学会, 理事 2018-08-14-今,中国计量测试学会集成电路测试专业委员会, 主任 2017-12-31-今,IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Associate Editor 2016-01-01-今,中国计量测试学会, 理事 2012-03-01-2016-01-29,中国计算机学会, 常务理事 2009-01-01-今,Journal of Computer Science & Technology (JCST), Associate Editor-in-Chief 2009-01-01-今,Journal of Electronic Testing, Associate Editor 2009-01-01-今,Journal of Low-Power Electronics, Associate Editor 2008-02-29-2016-01-31,中国计算机学会容错计算专业委员会, 主任 2004-03-01-2020-01-10,中国计算机学会, 理事